Tom Rini [Fri, 8 Aug 2025 17:13:41 +0000 (11:13 -0600)]
Merge tag 'u-boot-socfpga-next-20250808' of https://source.denx.de/u-boot/custodians/u-boot-socfpga
This pull request introduces initial U-Boot support for Agilex7 M-series, along
with several enhancements and cleanups across existing Agilex platforms. Key
changes include new board support, DDR driver additions, updated device trees,
and broader SoCFPGA SPL improvements.
Highlights:
- Agilex7 M-series bring-up:
- Basic DT support and board initialization for Agilex7 M-series SoC and
SoCDK.
- New sdram_agilex7m DDR driver with UIBSSM mailbox support and HBM support.
- Clock driver support for Agilex7 M-series.
- New defconfig: socfpga_agilex7m_defconfig.
- Agilex and Agilex5 enhancements:
- Improved SPL support: ASYNC interrupt enabling, system manager init
refactor, and cold scratch register usage.
- Updated firewall probing and watchdog support in SPL.
- Cleaned up DDR code, added secure region support for ATF, and improved warm
reset handling.
- Device Tree and config updates:
- Migration to upstream Linux DT layout for Agilex platforms.
- Consolidated socfpga_agilex_defconfig and removed deprecated configs.
- Platform-specific environment variables for Distro Boot added.
- Driver fixes and cleanups:
- dwc_eth_xgmac and clk-agilex cleanup and improvements.
- Several coverity and style fixes.
Contributions in this PR are from Alif Zakuan Yuslaimi, Tingting Meng, and
Andrew Goodbody. This patch set has been tested on Agilex 5 devkit, Agilex
devkit and Agilex7m devkit.
Passing all pipeline tests at SoCFPGA U-boot custodian
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27318
- Several Smatch reported fixes.
- Enable the temperature command on imx8ulp-evk.
- Fix mx8mm_fracpll_tbl.
- Make optee packaging optional for imx8m.
- Reuse and export low_drive_freq_update() on imx9.
- Enable USB OTG ID pin pull up in SPL on dh-imx6.
Tingting Meng [Mon, 4 Aug 2025 01:24:56 +0000 (18:24 -0700)]
ddr: altera: Add DDR driver for Agilex7 M-series
This is for new platform enablement for Agilex7 M-series.
Add DDR driver for Agilex7 M-series. This driver is designed to support
DDR and HBM memory. The official HBM handoff is not ready yet, therefore
hardcoded handoff is used for HBM driver validation on mUDV board.
Tingting Meng [Mon, 4 Aug 2025 01:24:55 +0000 (18:24 -0700)]
ddr: altera: Add uibssm mailbox support for Agilex7 M-series with HBM
Add uibssm mailbox driver for Agilex7 M-series. HPS will interact with UIB
and HBM subsystem through software defined mailbox interface.
HPS can retrieve HBM memory interface calibration status, UIB
configuration, memory interfae configuration, trigger calibration and etc
with the list of supported mailbox command type and opcode.
Tingting Meng [Mon, 4 Aug 2025 01:24:53 +0000 (18:24 -0700)]
include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile
ATF boot flow (SPL->ATF->U-Boot Proper->OS) boot to OS via kernel.itb file
using bootm command.
Change to use CONFIG_SPL_ATF to differentiate the bootfile of default
environment variable. We shouldn't use CONFIG_FIT because it is enabled
by default for U-Boot Proper.
Tingting Meng [Mon, 4 Aug 2025 01:24:47 +0000 (18:24 -0700)]
arch: arm: dts: agilex: Switch to using upstream Linux DT config
Migrate the legacy Agilex platform to use the upstream Linux device tree
configuration. This helps reduce maintenance overhead and aligns U-Boot
with the Linux kernel's DTS hierarchy and naming conventions.
This change improves consistency between U-Boot and Linux by removing
custom/legacy DTS handling and instead relying on the standardized
definitions provided by the upstream Linux DTS.
Tingting Meng [Mon, 4 Aug 2025 01:24:46 +0000 (18:24 -0700)]
arch: arm: agilex: Clean up DT settings in U-Boot dtsi files
Reorganize misplaced properties by moving board-common settings from
socfpga_agilex_socdk-u-boot.dtsi to socfpga_agilex-u-boot.dtsi to maintain
proper separation between common and board-level configurations.
arm: socfpga: soc64: Perform warm reset after L2 reset in SPL
SPL checks for a magic word in the system manager's scratch
register to determine if an L2 reset has occurred. If detected,
SPL places all slave CPUs (CPU1–3) into WFI mode. The master
CPU (CPU0) then initiates a warm reset by writing to the RMR_EL3
system register and also enters WFI mode.
This warm reset flow is handled entirely within the HPS. The
function `socfpga_sysreset_request()` triggers the warm
reset, and upon SPL re-entry, the updated `lowlevel_init_soc64.S`
handles the necessary initialization.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Put all slave CPUs (CPU1-3) into WFI mode. Master CPU (CPU0) writes
the magic word into system manager's scratch register to indicate
the system has performed L2 reset and request reset manager to
perform hardware handshake and then trigger L2 reset. CPU0 put
itself into WFI mode. L2 reset will reboot all HPS CPU cores after
which all HPS cores are in WFI mode. L2 reset is followed by warm
reset request by SPL via RMR_EL3 system register.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
ddr: altera: agilex: Get ACF from boot scratch register
The DDR data rate must be set correctly in the DDRIOCTRL
register according to the Actual Clock Frequency (ACF) value.
By enabling the reading of ACF value from bit 18 of the boot
scratch register during initialization, the DDR data rate is
able to be configured accurately.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arm: socfpga: Define the usage of boot scratch cold reg 8
The boot scratch cold reg 8 is shared between DBE, DDR init progress
update and Linux EDAC. This patch defines how the bits are used by
respective features above and their macro names used in U-Boot.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
ddr: altera: soc64: Add secure region support for ATF flow
Setting up firewall regions based on SDRAM memory banks configuration
(up to CONFIG_NR_DRAM_BANKS banks) instead of using whole address space.
First 1 MiB (0 to 0xfffff) of SDRAM is configured as secure region,
other address spaces are non-secure regions. The ARM Trusted Firmware (ATF)
image is located in this first 1 MiB memory region. So, this can prevent
software executing at non-secure state EL0-EL2 and non-secure masters
access to secure region.
Add common function for firewall setup and reuse for all SoC64 devices.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arm: socfpga: agilex5: Refactor system manager driver initialization
Refactor system manager initialization by searching for system manager
alias in Agilex5 device tree instead of manually passing node name to
the device model calling function
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tien Fong Chee [Fri, 8 Aug 2025 14:20:42 +0000 (22:20 +0800)]
arm: socfpga: Enable ASYNC interrupts in Agilex SPL
Asynchronous aborts were previously masked at SPL
entry.
To ensure early detection of system errors
such as ECC faults or bus errors, asynchronous aborts
should be explicitly unmasked by clearing the A-bit in
the DAIF register during Agilex SPL initialization.
Primoz Fiser [Thu, 7 Aug 2025 13:13:54 +0000 (15:13 +0200)]
board: phytec: phycore-imx93: Add VOLT_LOW_DRIVE frequency fixup
For phyCORE-i.MX93 SoMs with i.MX93 parts running in VOLT_LOW_DRIVE mode
(SoCs with speed grade fuse set to 900 MHz) reduce usdhc clocks from 400
MHz to 266 MHz. Do this in board code since global imx9 board_fix_fdt()
is not used in case of phycore-imx93 board since commit d3b9b7996889
("board: phytec: imx93: Add eeprom-based hardware introspection").
While at it, add a note to ft_board_setup() function to inform that
fixup for Linux device-tree is taken care by ft_system_setup() in imx9
global arch/arm/mach-imx/imx9/soc.c implementation.
Primoz Fiser [Thu, 7 Aug 2025 13:13:53 +0000 (15:13 +0200)]
imx9: soc: Reuse and export low_drive_freq_update()
Reuse and export low_drive_freq_update() function. This way global imx9
board_fix_fdt() doesn't duplicate code. While low_drive_freq_update()
can be reused on boards such as phyCORE-i.MX93 (TARGET_PHYCORE_IMX93)
which is not using the global imx9 board_fix_fdt() implementation.
While at it, make printout logic less verbose by only outputting on the
error condition and not on each successful clock fixup. Also drop now
invalid comment (low_drive_freq_update() now does fixup for internal and
kernel device-tree).
Update Agilex SPL code to implement device tree model
for firewall registers setup by using DTreg driver to
probe from device tree for the firewall settings instead
of calling firewall driver function.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
configs: agilex: Combine defconfig for all boot flashes
Combine all MMC, NAND and QSPI configs into single defconfig which is named
as "socfpga_agilex_defconfig". This will be the default defconfig to use.
It supports booting from all three flashes using ARM Trusted Firmware (ATF)
as the secure runtime monitor.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Andrew Goodbody [Mon, 4 Aug 2025 15:11:38 +0000 (16:11 +0100)]
net: dwc_eth_xgmac_socfpga: Remove always true test
In dwxgmac_of_get_mac_mode there is a test for mac_mode which will
return if false. After this point mac_mode is guaranteed to be true so
there is no need to test for this. Remove that test.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Andrew Goodbody [Mon, 4 Aug 2025 15:11:37 +0000 (16:11 +0100)]
net: dwc_eth_xgmac: Use unwind goto on error
In xgmac_probe there is a direct return after the point where unwind
gotos start to be used to undo actions performed by earlier code. Use
the appropriate unwind goto instead.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
tools: mkeficapsule: resource leak in read_bin_file()
Free the allocated buffer in case of an error.
Fixes: 9e63786e2b4b ("tools: mkeficapsule: rework the code a little bit")
Addresses-Coverity-ID: 345917 Resource leak Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Fri, 25 Jul 2025 15:18:21 +0000 (09:18 -0600)]
pylibfdt: setup.py: Drop license_files
On more recent versions of setuptools the warning about not being able
to find the files specified in license_files has re-appeared. This is
because as best I can tell, it can't and won't look in $(srctree) but
rather only subdirectories of scripts/dtc/pylibfdt. Since we already
provide both SPDX tags and a license field with the SPDX contents, let
us just drop license_files as it's not mandatory.
drivers: scsi: fix inaccurate block count reporting in scsi operations
The 'blks' variable in scsi_read/write/erase functions is updated
regardless of pass/fail of the scsi operation . If the scsi operation
fails, 'blkcnt' is updated using an incorrect value of 'blks'. This
wrong 'blkcnt' is returned to the caller and it assumes all blocks were
processed correctly.
Fix this by updating the 'blks' variable only if the scsi operation
succeeds.
Tom Rini [Thu, 7 Aug 2025 17:14:07 +0000 (11:14 -0600)]
Merge patch series "arm: dts: k3-am62a: remove GP security variant for AM62A"
Bryan Brattlof <bb@ti.com> says:
The AM62Ax was created right when TI was shifting to their high security
(HS-FS and HS-SE) processes. During this transition a small subset of
AM62A parts where configured to use the old "GP" security for internal
and for select groups of partners but never sold for the wider public.
To help simplify the build and to avoid any confusion of which security
configurations are supported going forward remove the GP builds for the
AM62A SoCs.
arm: dts: k3-am62a-phycore: remove GP tiboot3 builds
The AM62Ax SoC family was the last part from TI to support the GP
security variant, however this security variant was used mostly
internally and with select early partners and never sold publicly.
To simplify things and to avoid any confusion on which parts are
supported in the future, remove the GP tiboo3.bin builds from binman.
The AM62Ax SoC family was the last part from TI to support the GP
security variant, however this security variant was used mostly
internally and with select early partners and never sold publicly.
To simplify things and to avoid any confusion of which parts are
supported in the future, remove the GP tiboot3.bin builds from binman.
Signed-off-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Yannic Moog [Wed, 6 Aug 2025 12:45:19 +0000 (14:45 +0200)]
dts: imx8m{m,n,p,q}: Make optee packaging optional
binman can omit packaging an optional blob when it is missing.
This allows us to not bother with config options.
The core challenge is the interaction between tf-a and OP-TEE where
U-Boot/binman does not know whether tf-a was built with SPD=opteed or
without. This is important because tf-a might jump into the void when no
optee_os is present, leading to boot failure. Thus by marking it
optional, user is prompted to recheck (due to the warning message)
whether they really have the right combination of tf-a and optee.
Due to a bug in binman, we had to guard binman tee.bin with OPTEE config
as builds would error when tee.bin was not present in path; Even though
optee_os was marked as optional in the binman tree. Since the bug has
been resolved in
commit d4f61eae2ab7 ("Merge patch series "Fix handling of optional blobs in binman"")
we can mark it optional again without getting build errors.
Note that after this commit a warning will be printed when optee is not
present for a binman build.
Image 'image' is missing optional external blobs but is still functional: tee-os
/binman/section/fit/images/tee/tee-os (tee.bin):
See the documentation for your board. You may need to build Open Portable
Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin
Andrew Goodbody [Tue, 5 Aug 2025 11:23:06 +0000 (12:23 +0100)]
net: fec_mxc: Set error code on error exit
In fecmxc_probe if a timeout is detected when resetting the chip no
error code is set before taking the error exit. This could lead to a
silent failure. Instead set an error code.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Marek Vasut [Mon, 28 Jul 2025 22:38:34 +0000 (00:38 +0200)]
ARM: imx6: dh-imx6: Enable USB OTG ID pin pull up in SPL
Enable SoC pull up for USB OTG ID pin in SPL. There is no dedicated pull up
resistor on the SoM itself, and the pull up is mandatory for correct USB OTG
ID pin detection. U-Boot proper already configures the USB OTG ID pin pull
up via DT pinctrl node entry.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Andrew Goodbody [Mon, 28 Jul 2025 16:42:21 +0000 (17:42 +0100)]
imx: scu_api: Remove unnecessary NULL check
In sc_seco_secvio_dgo_config there is a check for data being NULL but
this occurs after data has already been dereferenced. All callers of the
function provide a valid pointer for data so no need for the NULL check.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Marek Vasut [Wed, 6 Aug 2025 14:58:54 +0000 (16:58 +0200)]
arm64: renesas: r8a779g3: Enable Winbond SPI NOR support on Retronix R-Car V4H Sparrow Hawk board
Enable support for Winbond SPI NOR on Retronix R-Car V4H Sparrow Hawk board,
this is required to support W77Q51NW on new board revision EVTB1 operational.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Andrew Goodbody [Wed, 6 Aug 2025 10:19:11 +0000 (11:19 +0100)]
net: rswitch: Fix error detection
In rswitch_probe the error detection after the call to devm_clk_get is
very wrong. It checks the value of ret which is uninitialised at that
point. Instead it should be using the macros for including errors into
pointers.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 20 Jul 2025 19:58:47 +0000 (21:58 +0200)]
mtd: spi-nor-ids: Add support for Winbond W77Q51NW
Add IDs for Winbond W77Q51NW, 512M-bit Secure Serial Flash Memory
with Post-Quantum Cryptography, Dual/Quad SPI, QPI and DTR . The
flash part is similar to W25Q512NWM .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Andrew Goodbody [Thu, 24 Jul 2025 10:48:12 +0000 (11:48 +0100)]
clk: renesas: Do not test unsigned variable to be less than 0
In rcar_clk_set_rate64_div_table the unsigned variable 'value' is used
to receive the return value from rcar_clk_get_table_val which returns an
int and then attempts to test for being less than 0, which can never be
true. Instead declare value as an int so the code can behave as
expected. Also remove initial values from 'value' and 'div' as they are
not needed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Dinesh Maniyam [Wed, 6 Aug 2025 04:32:33 +0000 (12:32 +0800)]
test: cmd: Add simple test for i3c
Add simple test to check i3c controller defined in sandbox test DT.
Basically, this test case will check validity of the i3c controller
by probing it and perform basic commands of cmd/i3c.c
Dinesh Maniyam [Wed, 6 Aug 2025 04:32:31 +0000 (12:32 +0800)]
i3c: master: dw-i3c-master: Fix OD_TIMING for spike filter
Fix the I3C device with spike filter unable to detect issue by setting
tHIGH_INIT to 200ns for first broadcast address.
This is according to MIPI SPEC 1.1.1 for first broadcast address
which is already part of linux upstreamed patch.
Dinesh Maniyam [Wed, 6 Aug 2025 04:32:30 +0000 (12:32 +0800)]
drivers: i3c: master: Enable probe i3c without slave device
Picked linux i3c driver upstraming patch to fix the issue to
probe for i3c controller without slave device attached.
With this fix, the ret check will be on command error and will success
without slave device attached.
Philip Molloy [Mon, 28 Jul 2025 13:04:03 +0000 (13:04 +0000)]
Makefile: Remove expansion of undefined variable
The U-Boot environment was previously stored in the boot loader stream
using ldr, but it has been replaced by the default environment built
into the U-Boot executable or an environment on external storage
Michal Simek [Tue, 29 Jul 2025 07:12:54 +0000 (09:12 +0200)]
cmd: bdinfo: Fix showing correct IP address based on current device
Use the same logic as is used for MAC address where bdi shows mac address
for current device where index (idx) is used to point to correct IP address
which is read and show.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Andrew Goodbody [Fri, 1 Aug 2025 09:54:06 +0000 (10:54 +0100)]
mtd: rawnand: mxs_nand: Ensure err is set for error path
In mxs_nand_init_ctrl there are a couple of error paths that do not set
err which could lead to the errors being silently ignored despite the
function not completing. Rather than just using if to detect these
errors use err to collect the error return value from the called
functions.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Andrew Goodbody [Fri, 1 Aug 2025 09:54:05 +0000 (10:54 +0100)]
mtd: rawnand: denali: Remove always true test
In denali_wait_for_irq the code will either return from inside the while
loop or exit with time_left being 0. The following test for time_left
being 0 is guranteed to be true so remove the test and the following
unreachable code.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Andrew Goodbody [Fri, 1 Aug 2025 09:54:04 +0000 (10:54 +0100)]
mtd: rawnand: cortina_nand: Fix -ENOMEM detection
In init_nand_dma there was code to detect failure to allocate memory but
it had two problems. Firstly the 2nd clause when info->tx_desc was NULL
attempted to free info->tx_desc when it should be freeing info->rx_desc.
Secondly there was no detection of both allocations failing, arguably
the more likely scenario. Refactor the code to simplify it and just fail
as soon as either allocation fails.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Andrew Goodbody [Fri, 1 Aug 2025 10:39:14 +0000 (11:39 +0100)]
mtd: rawnand: stm32_fmc2: Ensure to return error code
In stm32_fmc2_nfc_probe there are 3 error returns that do not set the
error code before returning which could lead to the error being silently
ignored. Just return -EINVAL in each case.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
projects / thirdparty / u-boot.git / log
