]> git.ipfire.org Git - thirdparty/glibc.git/commit
x86-64: Optimize load of all bits set into ZMM register [BZ #28252]
authorH.J. Lu <hjl.tools@gmail.com>
Fri, 20 Aug 2021 13:42:24 +0000 (06:42 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Sun, 22 Aug 2021 13:23:37 +0000 (06:23 -0700)
commit78c9ec9000f873abe7a15a91b87080a2e4308260
tree1fb85aec1d1f6394f650758f5074130e77fea131
parentc333dcf8d8f9e6e46475d9eff24bd5394b5d3d9e
x86-64: Optimize load of all bits set into ZMM register [BZ #28252]

Optimize loads of all bits set into ZMM register in AVX512 SVML codes
by replacing

vpbroadcastq .L_2il0floatpacket.16(%rip), %zmmX

and

vmovups   .L_2il0floatpacket.13(%rip), %zmmX

with
vpternlogd $0xff, %zmmX, %zmmX, %zmmX

This fixes BZ #28252.
sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S