]> git.ipfire.org Git - thirdparty/glibc.git/commit
x86: Enable non-temporal memset tunable for AMD
authorJoe Damato <jdamato@fastly.com>
Fri, 7 Jun 2024 23:04:47 +0000 (23:04 +0000)
committerNoah Goldstein <goldstein.w.n@gmail.com>
Mon, 10 Jun 2024 21:18:18 +0000 (16:18 -0500)
commitbef2a827a55fc759693ccc5b0f614353b8ad712d
treefbe0af5c5fa762b6086fd47efc8633d3ad1a4722
parent5968125f55a3a3f3394e4ebe45e1f96d4864c576
x86: Enable non-temporal memset tunable for AMD

In commit 46b5e98ef6f1 ("x86: Add seperate non-temporal tunable for
memset") a tunable threshold for enabling non-temporal memset was added,
but only for Intel hardware.

Since that commit, new benchmark results suggest that non-temporal
memset is beneficial on AMD, as well, so allow this tunable to be set
for AMD.

See:
https://docs.google.com/spreadsheets/d/1opzukzvum4n6-RUVHTGddV6RjAEil4P2uMjjQGLbLcU/edit?usp=sharing
which has been updated to include data using different stategies for
large memset on AMD Zen2, Zen3, and Zen4.

Signed-off-by: Joe Damato <jdamato@fastly.com>
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
sysdeps/x86/dl-cacheinfo.h