From 20a5be21e94dda0f9b02b1066e7d75226244ec19 Mon Sep 17 00:00:00 2001 From: Ivo Raisr Date: Wed, 27 Sep 2017 22:46:53 +0200 Subject: [PATCH] Fix a merging scenario in merge_vreg_states(). When a vreg becomes dead in one If-Then-Else leg, and is never referenced in the other leg, mark it as dead at the merge point. The other scenarios will need the same treatment eventually. --- VEX/priv/host_generic_reg_alloc3.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/VEX/priv/host_generic_reg_alloc3.c b/VEX/priv/host_generic_reg_alloc3.c index f910507f7e..889766d530 100644 --- a/VEX/priv/host_generic_reg_alloc3.c +++ b/VEX/priv/host_generic_reg_alloc3.c @@ -1537,7 +1537,26 @@ static void merge_vreg_states(RegAllocChunk* chunk, switch (v1_src_state->disp) { case Unallocated: - vassert(v2_src_state->disp == Unallocated); + switch (v2_src_state->disp) { + case Unallocated: + /* Good. Nothing to do. */ + break; + case Assigned: + case Spilled: + /* Should be dead by now. */ + vassert(v2_src_state->dead_before <= chunk->next->ii_total_start); + + HReg rreg2 = v2_src_state->rreg; + UInt r_idx = hregIndex(rreg2); + v2_src_state->disp = Unallocated; + v2_src_state->rreg = INVALID_HREG; + state2->rregs[r_idx].disp = Free; + state2->rregs[r_idx].vreg = INVALID_HREG; + state2->rregs[r_idx].eq_spill_slot = False; + break; + default: + vassert(0); + } break; case Assigned: -- 2.47.2