From d4720a7faf4bb415f3fe7f10e5c888212b81316a Mon Sep 17 00:00:00 2001 From: Glenn Miles Date: Mon, 12 May 2025 13:10:19 +1000 Subject: [PATCH] ppc/xive2: Fix treatment of PIPR in CPPR update MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit According to the XIVE spec, updating the CPPR should also update the PIPR. The final value of the PIPR depends on other factors, but it should never be set to a value that is above the CPPR. Also added support for redistributing an active group interrupt when it is precluded as a result of changing the CPPR value. Signed-off-by: Glenn Miles Reviewed-by: Nicholas Piggin Reviewed-by: Michael Kowal Reviewed-by: Caleb Schlossin Tested-by: Gautam Menghani Link: https://lore.kernel.org/qemu-devel/20250512031100.439842-11-npiggin@gmail.com Signed-off-by: Cédric Le Goater --- hw/intc/xive2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 36e842f041..c23933f8f5 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -995,7 +995,9 @@ static void xive2_tctx_set_cppr(XiveTCTX *tctx, uint8_t ring, uint8_t cppr) } } } - regs[TM_PIPR] = pipr_min; + + /* PIPR should not be set to a value greater than CPPR */ + regs[TM_PIPR] = (pipr_min > cppr) ? cppr : pipr_min; rc = xive2_tctx_get_nvp_indexes(tctx, ring_min, &nvp_blk, &nvp_idx); if (rc) { -- 2.47.2