From f6603de71de4d48d79fbb33b07b59bb5aaa233f5 Mon Sep 17 00:00:00 2001 From: Harshal Gohel Date: Tue, 15 Jul 2025 20:05:41 +0200 Subject: [PATCH] realtek: rtl93xx: Add learning and flooding enable/disable Both RTL930x and RTL931x were missing the code to support enabling and disabling MAC address learning and unknown unicast flooding on a per-port basis. * rtl93*x_enable_learning() allows toggling of dynamic MAC learning on individual ports by modifying the L2 learning constraint control register. * rtl93*x_enable_flood() provides the ability to control unknown unicast flooding behavior, disabling forwarding when set. If it is enabled, it will just forward it. If it is disabled, packets will simply be dropped. Signed-off-by: Harshal Gohel Signed-off-by: Sharadanand Karanjkar Link: https://github.com/openwrt/openwrt/pull/19581 Signed-off-by: Hauke Mehrtens --- .../drivers/net/dsa/rtl83xx/rtl838x.h | 2 ++ .../drivers/net/dsa/rtl83xx/rtl930x.c | 22 +++++++++++++++++++ .../drivers/net/dsa/rtl83xx/rtl931x.c | 22 +++++++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h index b8f543bd9ea..749440f70b5 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h @@ -246,6 +246,8 @@ #define RTL838X_L2_LRN_CONSTRT_EN (0x3368) #define RTL838X_L2_PORT_LRN_CONSTRT (0x32A0) #define RTL839X_L2_PORT_LRN_CONSTRT (0x3914) +#define RTL930X_L2_LRN_PORT_CONSTRT_CTRL (0x90A4) +#define RTL931X_L2_LRN_PORT_CONSTRT_CTRL (0xC96C) #define RTL838X_L2_PORT_NEW_SALRN(p) (0x328c + (((p >> 4) << 2))) #define RTL839X_L2_PORT_NEW_SALRN(p) (0x38F0 + (((p >> 4) << 2))) diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c index 4116fe20088..dd1d3e5c174 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c @@ -296,6 +296,26 @@ static void rtl930x_l2_learning_setup(void) sw_w32((0x7fff << 2) | 0, RTL930X_L2_LRN_CONSTRT_CTRL); } +static void rtldsa_930x_enable_learning(int port, bool enable) +{ + /* Limit learning to maximum: 32k entries */ + sw_w32_mask(GENMASK(17, 3), enable ? (0x7ffe << 3) : 0, + RTL930X_L2_LRN_PORT_CONSTRT_CTRL + port * 4); +} + +static void rtldsa_930x_enable_flood(int port, bool enable) +{ + /* 0: forward + * 1: drop + * 2: trap to local CPU + * 3: copy to local CPU + * 4: trap to master CPU + * 5: copy to master CPU + */ + sw_w32_mask(GENMASK(2, 0), enable ? 0 : 1, + RTL930X_L2_LRN_PORT_CONSTRT_CTRL + port * 4); +} + static void rtl930x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[]) { u32 cmd = 1 << 17 | /* Execute cmd */ @@ -2513,4 +2533,6 @@ const struct rtl838x_reg rtl930x_reg = { .set_l3_egress_intf = rtl930x_set_l3_egress_intf, .set_distribution_algorithm = rtl930x_set_distribution_algorithm, .led_init = rtl930x_led_init, + .enable_learning = rtldsa_930x_enable_learning, + .enable_flood = rtldsa_930x_enable_flood, }; diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c index f6a098c701f..a1d0101f47f 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c @@ -869,6 +869,26 @@ static void rtl931x_l2_learning_setup(void) sw_w32((0xffff << 3) | FORWARD, RTL931X_L2_LRN_CONSTRT_CTRL); } +static void rtldsa_931x_enable_learning(int port, bool enable) +{ + /* Limit learning to maximum: 64k entries */ + sw_w32_mask(GENMASK(18, 3), enable ? (0xfffe << 3) : 0, + RTL931X_L2_LRN_PORT_CONSTRT_CTRL + port * 4); +} + +static void rtldsa_931x_enable_flood(int port, bool enable) +{ + /* 0: forward + * 1: drop + * 2: trap to local CPU + * 3: copy to local CPU + * 4: trap to master CPU + * 5: copy to master CPU + */ + sw_w32_mask(GENMASK(2, 0), enable ? 0 : 1, + RTL931X_L2_LRN_PORT_CONSTRT_CTRL + port * 4); +} + static u64 rtl931x_read_mcast_pmask(int idx) { u64 portmask; @@ -1690,4 +1710,6 @@ const struct rtl838x_reg rtl931x_reg = { .l2_learning_setup = rtl931x_l2_learning_setup, .l3_setup = rtl931x_l3_setup, .led_init = rtldsa_931x_led_init, + .enable_learning = rtldsa_931x_enable_learning, + .enable_flood = rtldsa_931x_enable_flood, }; -- 2.47.2