RISC-V: Add testcase for unsigned scalar SAT_MUL form 11

RISC-V: Add testcase for unsigned scalar SAT_MUL form 11

The form 11 of unsigned scalar SAT_MUL has supported from
the previous change.  Thus, add the test cases to make sure
it works well.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
	* gcc.target/riscv/sat/sat_u_mul-12-u16-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u16-from-u32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u16-from-u64.rv32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u16-from-u64.rv64.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u32-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u32-from-u64.rv32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u32-from-u64.rv64.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u64-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u8-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u8-from-u16.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u8-from-u32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u8-from-u64.rv32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-12-u8-from-u64.rv64.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u16-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u16-from-u32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u16-from-u64.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u32-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u32-from-u64.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u64-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u8-from-u128.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u8-from-u16.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u8-from-u32.c: New test.
	* gcc.target/riscv/sat/sat_u_mul-run-12-u8-from-u64.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>