]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: qcom: Use GIC_SPI macro for interrupt-map
authorKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tue, 7 Apr 2026 20:18:40 +0000 (22:18 +0200)
committerBjorn Andersson <andersson@kernel.org>
Sat, 9 May 2026 15:29:34 +0000 (10:29 -0500)
Make the complicated interrupt-map property (with multiple '0' entries)
a bit more readable by using known define for GIC_SPI.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260407201839.25759-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/glymur.dtsi
arch/arm64/boot/dts/qcom/kaanapali.dtsi
arch/arm64/boot/dts/qcom/msm8998.dtsi
arch/arm64/boot/dts/qcom/sm8750.dtsi

index c8f7eab2960664ef7bc0eb0f2d095351d67c9fd0..2378b7a4a30dfb110520b7e83ad1821a356528d3 100644 (file)
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 0 0 513 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 0 514 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 0 515 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 0 516 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 516 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_4_AUX_CLK>,
                                 <&gcc GCC_PCIE_4_CFG_AHB_CLK>,
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 0 0 526 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 0 428 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 0 429 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
                                 <&gcc GCC_PCIE_5_CFG_AHB_CLK>,
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 0 0 472 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 0 473 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 0 474 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 0 475 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_6_AUX_CLK>,
                                 <&gcc GCC_PCIE_6_CFG_AHB_CLK>,
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 0 0 831 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 0 832 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 0 833 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 0 834 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 831 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 833 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 834 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_3B_AUX_CLK>,
                                 <&gcc GCC_PCIE_3B_CFG_AHB_CLK>,
index bab654bbd6d041639dbb286342ff06e915d9fcb0..bcd1cee31356cbea651b5736b35de07f175deddd 100644 (file)
                        iommu-map = <0 &apps_smmu 0x1400 0x1>,
                                    <0x100 &apps_smmu 0x1401 0x1>;
 
-                       interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-map-mask = <0 0 0 0x7>;
                        #interrupt-cells = <1>;
 
index d41b5c470c485d18d93886ae7f6972443755dd56..34770601163729d08e6591bbd96e9b08426b05c4 100644 (file)
                                          "msi7",
                                          "global";
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
                                 <&gcc GCC_PCIE_0_AUX_CLK>,
index 417f28d8c9195f351c4e4edff5028fca020c2088..5921f83aafacb7ee728f335c3ed346614e0b0db6 100644 (file)
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_0_AUX_CLK>,
                                 <&gcc GCC_PCIE_0_CFG_AHB_CLK>,