static int iris_wait_for_system_response(struct iris_core *core)
{
- u32 hw_response_timeout_val = core->iris_platform_data->hw_response_timeout;
int ret;
if (core->state == IRIS_CORE_ERROR)
return -EIO;
ret = wait_for_completion_timeout(&core->core_init_done,
- msecs_to_jiffies(hw_response_timeout_val));
+ msecs_to_jiffies(HW_RESPONSE_TIMEOUT_VALUE));
if (!ret) {
core->state = IRIS_CORE_ERROR;
return -ETIMEDOUT;
const struct tz_cp_config *tz_cp_config_data;
u32 tz_cp_config_data_size;
u32 core_arch;
- u32 hw_response_timeout;
u32 num_vpp_pipe;
bool no_aon;
u32 max_session_count;
.inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc),
.tz_cp_config_data = tz_cp_config_sm8250,
.tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8250),
- .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
.num_vpp_pipe = 4,
.max_session_count = 16,
.max_core_mbpf = NUM_MBS_8K,
.inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc),
.tz_cp_config_data = tz_cp_config_sm8250,
.tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8250),
- .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
.num_vpp_pipe = 1,
.no_aon = true,
.max_session_count = 16,
.tz_cp_config_data = tz_cp_config_sm8550,
.tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8550),
.core_arch = VIDEO_ARCH_LX,
- .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
.num_vpp_pipe = 4,
.max_session_count = 16,
.max_core_mbpf = NUM_MBS_8K * 2,
.tz_cp_config_data = tz_cp_config_sm8550,
.tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8550),
.core_arch = VIDEO_ARCH_LX,
- .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
.num_vpp_pipe = 4,
.max_session_count = 16,
.max_core_mbpf = NUM_MBS_8K * 2,
.tz_cp_config_data = tz_cp_config_sm8550,
.tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8550),
.core_arch = VIDEO_ARCH_LX,
- .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
.num_vpp_pipe = 4,
.max_session_count = 16,
.max_core_mbpf = NUM_MBS_8K * 2,
.tz_cp_config_data = tz_cp_config_sm8550,
.tz_cp_config_data_size = ARRAY_SIZE(tz_cp_config_sm8550),
.core_arch = VIDEO_ARCH_LX,
- .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
.num_vpp_pipe = 2,
.max_session_count = 16,
.max_core_mbpf = ((4096 * 2176) / 256) * 4,
int iris_wait_for_session_response(struct iris_inst *inst, bool is_flush)
{
- struct iris_core *core = inst->core;
- u32 hw_response_timeout_val;
struct completion *done;
int ret;
- hw_response_timeout_val = core->iris_platform_data->hw_response_timeout;
done = is_flush ? &inst->flush_completion : &inst->completion;
mutex_unlock(&inst->lock);
- ret = wait_for_completion_timeout(done, msecs_to_jiffies(hw_response_timeout_val));
+ ret = wait_for_completion_timeout(done, msecs_to_jiffies(HW_RESPONSE_TIMEOUT_VALUE));
mutex_lock(&inst->lock);
if (!ret) {
iris_inst_change_state(inst, IRIS_INST_ERROR);