]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: qcom: milos: Add QCrypto nodes
authorAlexander Koskovich <akoskovich@pm.me>
Mon, 6 Apr 2026 02:10:15 +0000 (02:10 +0000)
committerBjorn Andersson <andersson@kernel.org>
Fri, 8 May 2026 01:26:13 +0000 (20:26 -0500)
Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
Reviewed-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260405-milos-qce-v1-2-6996fb0b8a9c@pm.me
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/milos.dtsi

index 347afce18924a2da507e2fca63751aa4039fe61c..f09b30ea96ee307bc83456bb928f47fa3c7a7b32 100644 (file)
                        clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
                };
 
+               cryptobam: dma-controller@1dc4000 {
+                       compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+                       reg = <0x0 0x01dc4000 0x0 0x28000>;
+
+                       interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH 0>;
+
+                       #dma-cells = <1>;
+
+                       iommus = <&apps_smmu 0x480 0>,
+                                <&apps_smmu 0x481 0>;
+
+                       qcom,ee = <0>;
+                       qcom,num-ees = <4>;
+                       num-channels = <20>;
+                       qcom,controlled-remotely;
+               };
+
+               crypto: crypto@1dfa000 {
+                       compatible = "qcom,milos-qce", "qcom,sm8150-qce", "qcom,qce";
+                       reg = <0x0 0x01dfa000 0x0 0x6000>;
+
+                       interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+                       interconnect-names = "memory";
+
+                       dmas = <&cryptobam 4>, <&cryptobam 5>;
+                       dma-names = "rx", "tx";
+
+                       iommus = <&apps_smmu 0x480 0>,
+                                <&apps_smmu 0x481 0>;
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0x0 0x01f40000 0x0 0x20000>;