]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/panfrost: Add bus_ace optional clock support for RZ/G2L
authorBiju Das <biju.das.jz@bp.renesas.com>
Fri, 20 Mar 2026 16:41:49 +0000 (16:41 +0000)
committerAdrián Larumbe <adrian.larumbe@collabora.com>
Fri, 27 Mar 2026 02:06:42 +0000 (02:06 +0000)
On RZ/G2L SoCs, the GPU MMU requires a bus_ace clock to operate correctly.
Without it, unbind/bind cycles leave the GPU non-operational, manifesting
as an AS_ACTIVE bit stuck and a soft reset timeout falling back to hard
reset. Add bus_ace_clock as an optional clock, wiring it into init/fini,
and the runtime suspend/resume paths alongside the existing optional
bus_clock.

Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Link: https://patch.msgid.link/20260320164158.487406-4-biju.das.jz@bp.renesas.com
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
drivers/gpu/drm/panfrost/panfrost_device.c
drivers/gpu/drm/panfrost/panfrost_device.h

index 01e702a0b2f0707a6c948fb9df6161490e6c8fcf..7fed22d555a576cc18d9c340cf61d5f30681285f 100644 (file)
@@ -70,8 +70,21 @@ static int panfrost_clk_init(struct panfrost_device *pfdev)
                        goto disable_clock;
        }
 
+       pfdev->bus_ace_clock = devm_clk_get_optional(pfdev->base.dev, "bus_ace");
+       if (IS_ERR(pfdev->bus_ace_clock)) {
+               err = PTR_ERR(pfdev->bus_ace_clock);
+               dev_err(pfdev->base.dev, "get bus_ace_clock failed %d\n", err);
+               goto disable_bus_clock;
+       }
+
+       err = clk_prepare_enable(pfdev->bus_ace_clock);
+       if (err)
+               goto disable_bus_clock;
+
        return 0;
 
+disable_bus_clock:
+       clk_disable_unprepare(pfdev->bus_clock);
 disable_clock:
        clk_disable_unprepare(pfdev->clock);
 
@@ -80,6 +93,7 @@ disable_clock:
 
 static void panfrost_clk_fini(struct panfrost_device *pfdev)
 {
+       clk_disable_unprepare(pfdev->bus_ace_clock);
        clk_disable_unprepare(pfdev->bus_clock);
        clk_disable_unprepare(pfdev->clock);
 }
@@ -432,6 +446,10 @@ static int panfrost_device_runtime_resume(struct device *dev)
                ret = clk_enable(pfdev->bus_clock);
                if (ret)
                        goto err_bus_clk;
+
+               ret = clk_enable(pfdev->bus_ace_clock);
+               if (ret)
+                       goto err_bus_ace_clk;
        }
 
        panfrost_device_reset(pfdev, true);
@@ -439,6 +457,9 @@ static int panfrost_device_runtime_resume(struct device *dev)
 
        return 0;
 
+err_bus_ace_clk:
+       if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
+               clk_disable(pfdev->bus_clock);
 err_bus_clk:
        if (pfdev->comp->pm_features & BIT(GPU_PM_RT))
                clk_disable(pfdev->clock);
@@ -462,6 +483,7 @@ static int panfrost_device_runtime_suspend(struct device *dev)
        panfrost_gpu_power_off(pfdev);
 
        if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) {
+               clk_disable(pfdev->bus_ace_clock);
                clk_disable(pfdev->bus_clock);
                clk_disable(pfdev->clock);
                reset_control_assert(pfdev->rstc);
index 0f399241220523bae12d5486954e676b778b4a78..ec55c136b1b6643dc616be21738201b4cb1bf66d 100644 (file)
@@ -136,6 +136,7 @@ struct panfrost_device {
        void __iomem *iomem;
        struct clk *clock;
        struct clk *bus_clock;
+       struct clk *bus_ace_clock;
        struct regulator_bulk_data *regulators;
        struct reset_control *rstc;
        /* pm_domains for devices with more than one. */