]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: get rid of amdgpu_ttm_clear_buffer
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tue, 18 Nov 2025 14:48:39 +0000 (15:48 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 17 Apr 2026 19:41:13 +0000 (15:41 -0400)
It's doing the same thing as amdgpu_fill_buffer(src_data=0), so drop it.

The only caveat is that amdgpu_res_cleared() return value is only valid
right after allocation.

---
v2: introduce new "bool consider_clear_status" arg
v6: dont pass a NULL resv when calling amdgpu_fill_buffer from
    amdgpu_bo_create
---

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h

index 27f7567df7bfcb3b0b65ff38b05860dd59b5a453..4d4775462099bcf9e659213527c3b559b5144428 100644 (file)
@@ -717,13 +717,17 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
            bo->tbo.resource->mem_type == TTM_PL_VRAM) {
                struct dma_fence *fence;
 
-               r = amdgpu_ttm_clear_buffer(bo, bo->tbo.base.resv, &fence);
+               r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev),
+                                      bo, 0, bo->tbo.base.resv, &fence,
+                                      true, AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
                if (unlikely(r))
                        goto fail_unreserve;
 
-               dma_resv_add_fence(bo->tbo.base.resv, fence,
-                                  DMA_RESV_USAGE_KERNEL);
-               dma_fence_put(fence);
+               if (fence) {
+                       dma_resv_add_fence(bo->tbo.base.resv, fence,
+                                          DMA_RESV_USAGE_KERNEL);
+                       dma_fence_put(fence);
+               }
        }
        if (!bp->resv)
                amdgpu_bo_unreserve(bo);
@@ -1326,8 +1330,8 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
                goto out;
 
        r = amdgpu_fill_buffer(amdgpu_ttm_next_clear_entity(adev),
-                              abo, 0, &bo->base._resv,
-                              &fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
+                              abo, 0, &bo->base._resv, &fence,
+                              false, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
        if (WARN_ON(r))
                goto out;
 
index acc5fa4b5702828ef916d7d68cbd1dc694ed3653..862b3c25a67212cd2032e888d795d3d34c171ce0 100644 (file)
@@ -418,7 +418,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
            (abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {
                struct dma_fence *wipe_fence = NULL;
                r = amdgpu_fill_buffer(entity, abo, 0, NULL, &wipe_fence,
-                                      AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
+                                      false, AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
                if (r) {
                        goto error;
                } else if (wipe_fence) {
@@ -2522,76 +2522,25 @@ static int amdgpu_ttm_fill_mem(struct amdgpu_device *adev,
 }
 
 /**
- * amdgpu_ttm_clear_buffer - clear memory buffers
- * @bo: amdgpu buffer object
- * @resv: reservation object
- * @fence: dma_fence associated with the operation
+ * amdgpu_fill_buffer - fill a buffer with a given value
+ * @entity: entity to use
+ * @bo: the bo to fill
+ * @src_data: the value to set
+ * @resv: fences contained in this reservation will be used as dependencies.
+ * @out_fence: the fence from the last clear will be stored here. It might be
+ *             NULL if no job was run.
+ * @dependency: optional input dependency fence.
+ * @consider_clear_status: true if region reported as cleared by amdgpu_res_cleared()
+ *                         are skipped.
+ * @k_job_id: trace id
  *
- * Clear the memory buffer resource.
- *
- * Returns:
- * 0 for success or a negative error code on failure.
  */
-int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
-                           struct dma_resv *resv,
-                           struct dma_fence **fence)
-{
-       struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
-       struct amdgpu_ttm_buffer_entity *entity;
-       struct amdgpu_res_cursor cursor;
-       u64 addr;
-       int r = 0;
-
-       if (!adev->mman.buffer_funcs_enabled)
-               return -EINVAL;
-
-       if (!fence)
-               return -EINVAL;
-       entity = &adev->mman.clear_entities[0];
-       *fence = dma_fence_get_stub();
-
-       amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor);
-
-       mutex_lock(&entity->lock);
-       while (cursor.remaining) {
-               struct dma_fence *next = NULL;
-               u64 size;
-
-               if (amdgpu_res_cleared(&cursor)) {
-                       amdgpu_res_next(&cursor, cursor.size);
-                       continue;
-               }
-
-               /* Never clear more than 256MiB at once to avoid timeouts */
-               size = min(cursor.size, 256ULL << 20);
-
-               r = amdgpu_ttm_map_buffer(entity, &bo->tbo, bo->tbo.resource, &cursor,
-                                         0, false, &size, &addr);
-               if (r)
-                       goto err;
-
-               r = amdgpu_ttm_fill_mem(adev, entity, 0, addr, size, resv,
-                                       &next, true,
-                                       AMDGPU_KERNEL_JOB_ID_TTM_CLEAR_BUFFER);
-               if (r)
-                       goto err;
-
-               dma_fence_put(*fence);
-               *fence = next;
-
-               amdgpu_res_next(&cursor, size);
-       }
-err:
-       mutex_unlock(&entity->lock);
-
-       return r;
-}
-
 int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
                       struct amdgpu_bo *bo,
                       uint32_t src_data,
                       struct dma_resv *resv,
-                      struct dma_fence **f,
+                      struct dma_fence **out_fence,
+                      bool consider_clear_status,
                       u64 k_job_id)
 {
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
@@ -2609,6 +2558,11 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
                struct dma_fence *next;
                uint64_t cur_size, to;
 
+               if (consider_clear_status && amdgpu_res_cleared(&dst)) {
+                       amdgpu_res_next(&dst, dst.size);
+                       continue;
+               }
+
                /* Never fill more than 256MiB at once to avoid timeouts */
                cur_size = min(dst.size, 256ULL << 20);
 
@@ -2630,9 +2584,7 @@ int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
        }
 error:
        mutex_unlock(&entity->lock);
-       if (f)
-               *f = dma_fence_get(fence);
-       dma_fence_put(fence);
+       *out_fence = fence;
        return r;
 }
 
index 471a79c153cf948c95002f79bd70f616ff36b713..1ef78af62d4ecb66fe29ad71d7c88435cafbea5d 100644 (file)
@@ -194,14 +194,12 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev,
                       struct dma_resv *resv,
                       struct dma_fence **fence,
                       bool vm_needs_flush, uint32_t copy_flags);
-int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
-                           struct dma_resv *resv,
-                           struct dma_fence **fence);
 int amdgpu_fill_buffer(struct amdgpu_ttm_buffer_entity *entity,
                       struct amdgpu_bo *bo,
                       uint32_t src_data,
                       struct dma_resv *resv,
-                      struct dma_fence **f,
+                      struct dma_fence **out_fence,
+                      bool consider_clear_status,
                       u64 k_job_id);
 struct amdgpu_ttm_buffer_entity *amdgpu_ttm_next_clear_entity(struct amdgpu_device *adev);