arm64: dts: qcom: sm8750: Enable cpufreq cooling devices

Add cooling-cells property to the CPU nodes to support cpufreq
cooling devices.

Signed-off-by: Aastha Pandey <aastha.pandey@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-cpufreq-v1-1-9d465988c3f9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 18fb52c14acd75c617f2cac8be298b49308c6410..417f28d8c9195f351c4e4edff5028fca020c2088 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -42,6 +42,7 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
 
                        l2_0: l2-cache {
                                compatible = "cache";
@@ -58,6 +59,7 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@200 {
@@ -68,6 +70,7 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd2>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@300 {
@@ -78,6 +81,7 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd3>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
                };
 
                cpu4: cpu@400 {
@@ -88,6 +92,7 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd4>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
                };
 
                cpu5: cpu@500 {
@@ -98,6 +103,7 @@
                        next-level-cache = <&l2_0>;
                        power-domains = <&cpu_pd5>, <&scmi_dvfs 0>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
                };
 
                cpu6: cpu@10000 {
@@ -108,6 +114,7 @@
                        next-level-cache = <&l2_1>;
                        power-domains = <&cpu_pd6>, <&scmi_dvfs 1>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
 
                        l2_1: l2-cache {
                                compatible = "cache";
@@ -124,6 +131,7 @@
                        next-level-cache = <&l2_1>;
                        power-domains = <&cpu_pd7>, <&scmi_dvfs 1>;
                        power-domain-names = "psci", "perf";
+                       #cooling-cells = <2>;
                };
 
                cpu-map {