The following RK3576 boards expose a GPIO pin to control the voltage
bias on the HDMI data lines:
- rk3576-100ask-dshanpi-a1
- rk3576-armsom-sige5
- rk3576-evb1-v10
- rk3576-evb2-v10
- rk3576-nanopi-m5
- rk3576-roc-pc
- rk3576-rock-4d
The pin must be asserted when operating in HDMI 2.1 FRL mode and
deasserted for HDMI 1.4/2.0 TMDS mode.
Wire up the hdmi node to its dedicated GPIO via frl-enable-gpios to
allow adjusting the bias when transitioning between TMDS and FRL modes.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-1-924df9db884a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
};
&hdmi {
+ frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
};
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pcie {
pcie_reset: pcie-reset {
rockchip,pins = <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
&hdmi {
+ frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
};
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
&hdmi {
+ frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
};
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
&hdmi {
+ frl-enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
};
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
&hdmi {
+ frl-enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
};
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
&hdmi {
+ frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
&pinctrl {
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
rtc_int_l: rtc-int-l {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
&hdmi {
+ frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
+ pinctrl-names = "default";
status = "okay";
};
};
&pinctrl {
+ hdmi {
+ hdmi_tx_on_h: hdmi-tx-on-h {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;