/* Flattened structure containing SOC BB parameters stored in the VBIOS
* It is not practical to store the entire bounding box in VBIOS since the bounding box struct can gain new parameters.
- * This also prevents alighment issues when new parameters are added to the SoC BB.
+ * This also prevents alignment issues when new parameters are added to the SoC BB.
* The following parameters should be added since these values can't be obtained elsewhere:
* -dml2_soc_power_management_parameters
* -dml2_soc_vmin_clock_limits
};
/*
- * Update a register with specified masks and values sequeunce
+ * Update a register with specified masks and values sequence
*
* 60 payload bytes can hold address + up to 7 sets of mask/value combo, each take 2 dword
*
/**
* Set PSR level.
- * PSR level is a 16-bit value dicated by driver that
+ * PSR level is a 16-bit value dictated by driver that
* will enable/disable different functionality.
*/
DMUB_CMD__PSR_SET_LEVEL = 4,
*/
union dmub_psr_debug_flags debug;
/**
- * 16-bit value dicated by driver that will enable/disable different functionality.
+ * 16-bit value dictated by driver that will enable/disable different functionality.
*/
uint16_t psr_level;
/**
*/
uint8_t aux_inst;
/**
- * Determines if SMU optimzations are enabled/disabled.
+ * Determines if SMU optimizations are enabled/disabled.
*/
uint8_t smu_optimizations_en;
/**
*/
struct dmub_cmd_psr_set_level_data {
/**
- * 16-bit value dicated by driver that will enable/disable different functionality.
+ * 16-bit value dictated by driver that will enable/disable different functionality.
*/
uint16_t psr_level;
/**
*/
struct dmub_cmd_psr_set_vtotal_data {
/**
- * 16-bit value dicated by driver that indicates the vtotal in PSR active requirement when screen idle..
+ * 16-bit value dictated by driver that indicates the vtotal in PSR active requirement when screen idle..
*/
uint16_t psr_vtotal_idle;
/**
*/
uint8_t panel_inst;
/*
- * 16-bit value dicated by driver that indicates the vtotal in PSR active requirement when doing SU/FFU.
+ * 16-bit value dictated by driver that indicates the vtotal in PSR active requirement when doing SU/FFU.
*/
uint16_t psr_vtotal_su;
/**
uint8_t aux_inst;
/**
* Panel Instance.
- * Panel isntance to identify which psr_state to use
+ * Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
*/
uint8_t dpphy_inst;
/**
- * Determines if SMU optimzations are enabled/disabled.
+ * Determines if SMU optimizations are enabled/disabled.
*/
uint8_t smu_optimizations_en;
/**
uint8_t enable;
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
uint8_t enable;
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
struct dmub_cmd_replay_set_power_opt_data {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
struct dmub_cmd_replay_set_timing_sync_data {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
struct dmub_cmd_replay_set_pseudo_vtotal {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
struct dmub_cmd_replay_disabled_adaptive_sync_sdp_data {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
struct dmub_cmd_replay_set_general_cmd_data {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
*/
struct dmub_cmd_replay_set_coasting_vtotal_data {
/**
- * 16-bit value dicated by driver that indicates the coasting vtotal.
+ * 16-bit value dictated by driver that indicates the coasting vtotal.
*/
uint16_t coasting_vtotal;
/**
uint8_t cmd_version;
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
/**
- * 16-bit value dicated by driver that indicates the coasting vtotal high byte part.
+ * 16-bit value dictated by driver that indicates the coasting vtotal high byte part.
*/
uint16_t coasting_vtotal_high;
/**
struct dmub_cmd_replay_frameupdate_timer_data {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
union dmub_replay_cmd_set {
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
uint8_t opp_inst;
/**
* OTG HW instance for global update lock.
- * TODO: Remove, and re-use otg_inst.
+ * TODO: Remove, and reuse otg_inst.
*/
uint8_t dig_inst;
/**
uint8_t enable;
/**
* Panel Instance.
- * Panel isntance to identify which replay_state to use
+ * Panel instance to identify which replay_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
uint8_t aux_inst;
/**
* Panel Instance.
- * Panel isntance to identify which psr_state to use
+ * Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
*/
uint8_t dpphy_inst;
/**
- * Determines if SMU optimzations are enabled/disabled.
+ * Determines if SMU optimizations are enabled/disabled.
*/
uint8_t smu_optimizations_en;
/**
*/
uint32_t line_time_in_ns;
/*
- * Use FSFT afftet pixel clk
+ * Use FSFT after pixel clk
*/
uint32_t pix_clk_100hz;
/*
struct dmub_cmd_pr_update_state_data {
/**
* Panel Instance.
- * Panel isntance to identify which psr_state to use
+ * Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
struct dmub_cmd_pr_general_cmd_data {
/**
* Panel Instance.
- * Panel isntance to identify which psr_state to use
+ * Panel instance to identify which psr_state to use
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;