]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: qcom: qcs6490-rb3gen2: Enable CAN bus controller
authorViken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Fri, 3 Apr 2026 06:40:34 +0000 (12:10 +0530)
committerBjorn Andersson <andersson@kernel.org>
Mon, 27 Apr 2026 19:48:26 +0000 (14:48 -0500)
Enable the MCP2518FD CAN controller on the QCS6490 RB3 Gen2 platform.
The controller is connected via SPI3 and uses a 40 MHz oscillator.

Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260403-can-spi-kodiak-dtsi-v1-1-4055e67dd3fc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts

index e393ccf1884afde7816739053d41ca789acfca91..ceb68a890bf401ca1d0c787a801d6b192f4e0743 100644 (file)
                stdout-path = "serial0:115200n8";
        };
 
+       clocks {
+               mcp2518fd_osc: can-clk {
+                       compatible = "fixed-clock";
+                       clock-frequency = <40000000>;
+                       #clock-cells = <0>;
+               };
+       };
+
        dp-connector {
                compatible = "dp-connector";
                label = "DP";
        };
 };
 
+&spi3 {
+       status = "okay";
+
+       can@0 {
+               compatible = "microchip,mcp2518fd";
+               reg = <0>;
+               interrupts-extended = <&tlmm 7 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&mcp2518fd_osc>;
+               spi-max-frequency = <14000000>;
+               vdd-supply = <&vreg_l11c_2p8>;
+               microchip,xstbyen;
+       };
+};
+
 &swr2 {
        status = "okay";