drm/amdgpu/gfxhub: Program CRASH_ON_*_FAULT bits to 0 as needed

When the fault stop mode isn't AMDGPU_VM_FAULT_STOP_ALWAYS,
these bits should be programmed to 0.

Program CRASH_ON_NO_RETRY_FAULT and CRASH_ON_RETRY_FAULT
always, to make sure to clear the bits when we don't want
to crash.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit d0cd99e73090700b7a942b98a3327ec966597d0a)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
index f9949fedfbb999cfc16ca9ea790edbec04823fa8..f2fe6f5bc7f7f1232cca4512ef983ee242337d44 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
@@ -449,12 +449,10 @@ static void gfxhub_v11_5_0_set_fault_enable_default(struct amdgpu_device *adev,
                            WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
                            EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c
index 7609b9cecae8456f2b304ba21773a12e5fd983fb..efcaca70c27adec64407b1d8c25d4e8a83378ea4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_0.c
@@ -454,12 +454,10 @@ static void gfxhub_v12_0_set_fault_enable_default(struct amdgpu_device *adev,
                            WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
                            EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
index 3544eb42dca608eaf289ac10ac687d14ac9ce84e..4c2fd1e6616e4fa71703123b07406e5a60b6bb8e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
@@ -633,19 +633,17 @@ static void gfxhub_v12_1_xcc_set_fault_enable_default(struct amdgpu_device *adev
                tmp = REG_SET_FIELD(tmp,
                                    GCVM_L2_PROTECTION_FAULT_CNTL_LO32,
                                    OTHER_CLIENT_ID_NO_RETRY_FAULT_INTERRUPT, value);
-               if (!value)
-                       tmp = REG_SET_FIELD(tmp,
-                                           GCVM_L2_PROTECTION_FAULT_CNTL_LO32,
-                                           CRASH_ON_NO_RETRY_FAULT, 1);
+               tmp = REG_SET_FIELD(tmp,
+                                   GCVM_L2_PROTECTION_FAULT_CNTL_LO32,
+                                   CRASH_ON_NO_RETRY_FAULT, !value);
                WREG32_SOC15(GC, GET_INST(GC, i),
                             regGCVM_L2_PROTECTION_FAULT_CNTL_LO32, tmp);
 
                tmp = RREG32_SOC15(GC, GET_INST(GC, i),
                                   regGCVM_L2_PROTECTION_FAULT_CNTL_HI32);
-               if (!value)
-                       tmp = REG_SET_FIELD(tmp,
-                                           GCVM_L2_PROTECTION_FAULT_CNTL_HI32,
-                                           CRASH_ON_RETRY_FAULT, 1);
+               tmp = REG_SET_FIELD(tmp,
+                                   GCVM_L2_PROTECTION_FAULT_CNTL_HI32,
+                                   CRASH_ON_RETRY_FAULT, !value);
                WREG32_SOC15(GC, GET_INST(GC, i),
                             regGCVM_L2_PROTECTION_FAULT_CNTL_HI32, tmp);
        }

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index a7bfc9f41d0e397c5dea612acf9781ee75a5bf0c..bfe247b1a333c8635ad347ccc04af497ed5ddcf3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -403,12 +403,10 @@ static void gfxhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev,
                        WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
                        EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
+                       CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
+                       CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
index 6c03bf9f1ae85ddbd0aa96c22c07139aee4ad278..fbdf46070b38b7a36aafe0c09e6f52d849007c5b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
@@ -516,12 +516,10 @@ static void gfxhub_v1_2_xcc_set_fault_enable_default(struct amdgpu_device *adev,
                                WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
                tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
                                EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-               if (!value) {
-                       tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
-                                       CRASH_ON_NO_RETRY_FAULT, 1);
-                       tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
-                                       CRASH_ON_RETRY_FAULT, 1);
-               }
+               tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
+                               CRASH_ON_NO_RETRY_FAULT, !value);
+               tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
+                               CRASH_ON_RETRY_FAULT, !value);
                WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL, tmp);
        }
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
index 793faf62cb073a82fe23a7b59ae9570b541589be..9ea593e2c7199d8b3ddfe2be4a5ac8df1e95a037 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
@@ -418,12 +418,10 @@ static void gfxhub_v2_0_set_fault_enable_default(struct amdgpu_device *adev,
                            WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
                            EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
index aceb8447feaccc596e01c50f8468362ef91ff153..30b90d35abd01815a40286f85ab80a20d0e57fc2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
@@ -449,12 +449,10 @@ static void gfxhub_v2_1_set_fault_enable_default(struct amdgpu_device *adev,
                            WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
                            EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
index abe30c8bd2bae40312d6ce49ced08cbadfd4464e..f089f70571aab7d7613c9d6246c48836f47d09a5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
@@ -446,12 +446,10 @@ static void gfxhub_v3_0_set_fault_enable_default(struct amdgpu_device *adev,
                            WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
                            EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
index b3ef6e71811f3e0ce1973bfbf04a868801279ebe..128115a2cb458ee4257cab68dc06c396f9327289 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
@@ -434,12 +434,10 @@ static void gfxhub_v3_0_3_set_fault_enable_default(struct amdgpu_device *adev,
                            WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
                            EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, value);
-       if (!value) {
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_NO_RETRY_FAULT, 1);
-               tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
-                               CRASH_ON_RETRY_FAULT, 1);
-       }
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_NO_RETRY_FAULT, !value);
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL,
+                           CRASH_ON_RETRY_FAULT, !value);
        WREG32_SOC15(GC, 0, regGCVM_L2_PROTECTION_FAULT_CNTL, tmp);
 }