FLAG( 820, 3, ECX, 5, 1, L3_CACHE_RMT_SLOW_BW_FILL, NO, 0 ) \
FLAG( 820, 3, ECX, 6, 1, L3_CACHE_BW_VIC, NO, 0 )
+#define CPUID_821_EAX_5 \
+FLAG( 821, 0, EAX, 5, 1, CPUID_821_RSVD1, NO, 0 )
+#define CPUID_821_ECX_1 \
+FLAG( 821, 0, ECX, 1, 1, CPUID_821_RSVD2, NO, 0 )
+#define CPUID_821_ECX_2 \
+FLAG( 821, 0, ECX, 2, 1, CPUID_821_RSVD3, NO, 0 )
+
/* LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME, MON SUPP, HWV */
#define CPUID_FIELD_DATA_LEVEL_821 \
FLAG( 821, 0, EAX, 0, 1, NO_NESTED_DATA_BP, NO, 0 ) \
FLAG( 821, 0, EAX, 1, 1, NON_SERIALIZING_FSGSBASE, NO, 0 ) \
FLAG( 821, 0, EAX, 2, 1, ALWAYS_SERIALIZING_LFENCE, YES, 19 ) \
FLAG( 821, 0, EAX, 3, 1, SMM_PGCFG_LOCK, NO, 0 ) \
+CPUID_821_EAX_5 \
FLAG( 821, 0, EAX, 6, 1, NULL_SELECTOR_CLEARS_BASE, NO, 0 ) \
FLAG( 821, 0, EAX, 7, 1, UPPER_ADDRESS_IGNORE, YES, 20 ) \
FLAG( 821, 0, EAX, 8, 1, AUTOMATIC_IBRS, YES, 20 ) \
FLAG( 821, 0, EAX, 20, 1, LEAF821_PREFETCHI, YES, 22 ) \
FLAG( 821, 0, EAX, 24, 1, ERAPS, NO, 0 ) \
FIELD(821, 0, EBX, 0, 12, MICROCODE_PATCH_SIZE, NO, 0 ) \
-FIELD(821, 0, EBX, 16, 8, RAP_SIZE, NO, 0 )
+FIELD(821, 0, EBX, 16, 8, RAP_SIZE, NO, 0 ) \
+CPUID_821_ECX_1 \
+CPUID_821_ECX_2
/* LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME, MON SUPP, HWV */
#define CPUID_FIELD_DATA_LEVEL_822 \