drop kvm patch from 6.1 and 6.6 as it broke the build

diff --git a/queue-6.1/kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch b/queue-6.1/kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch
deleted file mode 100644 (file)
index bd898ea..0000000
--- a/queue-6.1/kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From e800decd9c0ac4349bcd8f8f9b29fd21fe93165e Mon Sep 17 00:00:00 2001
-From: Venkatesh Srinivas <venkateshs@chromium.org>
-Date: Wed, 15 Jul 2026 23:42:35 +0000
-Subject: KVM: x86: Only reset TSC Deadline Timer in apic_timer_expired on KVM_RUN
-
-From: Venkatesh Srinivas <venkateshs@chromium.org>
-
-commit e800decd9c0ac4349bcd8f8f9b29fd21fe93165e upstream.
-
-On Intel platforms with a VMX preemption timer and APICv, if a VMM
-calls KVM_GET_LAPIC before KVM_GET_MSRS to save the vCPU state, it is
-possible to lose a pending timer interrupt.
-
-If the thread running these ioctls is migrated to another core after
-calling KVM_GET_LAPIC but before KVM_GET_MSRS and the guest is using
-their LAPIC timer in TSC-deadline mode, not only does the save LAPIC
-state not carry the pending interrupt, the TSCDEADLINE MSR will be
-zeroed.
-
-After migration across CPUs, KVM_GET_MSRS calls vcpu_load, posting the
-interrupt and clearing the MSR:
-vcpu_load() ->
-  kvm_arch_vcpu_load() ->
-    kvm_lapic_restart_hv_timer() ->
-      start_hv_timer() ->
-        apic_timer_expired() ->
-          kvm_apic_inject_pending_timer_irqs()
-            . post interrupt into the LAPIC state
-            . clear IA32_TSCDEADLINE
-
-The saved LAPIC state will be missing the pending interrupt and the saved
-MSR will be zero. Oops.
-
-Fix by only posting an interrupt when we're attempting to enter the guest
-(vcpu->wants_to_run == true), not for vcpu_load from other paths.
-
-Assisted-by: gemini:gemini-3.1-pro-preview
-Debugged-by: David Matlack <dmatlack@google.com>
-Debugged-by: Sean Christopherson <seanjc@google.com>
-Debugged-by: Jim Mattson <jmattson@google.com>
-Debugged-by: James Houghton <jthoughton@google.com>
-Signed-off-by: Venkatesh Srinivas <venkateshs@chromium.org>
-Message-ID: <20260715234234.15382-2-venkateshs@chromium.org>
-Reviewed-by: James Houghton <jthoughton@google.com>
-Reviewed-by: Chao Gao <chao.gao@intel.com>
-Cc: stable@vger.kernel.org
-Fixes: ae95f566b3d2 ("KVM: X86: TSCDEADLINE MSR emulation fastpath", 2020-05-15)
-Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/x86/kvm/lapic.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/x86/kvm/lapic.c
-+++ b/arch/x86/kvm/lapic.c
-@@ -1745,7 +1745,7 @@ static void apic_timer_expired(struct kv
-       if (apic_lvtt_tscdeadline(apic) || ktimer->hv_timer_in_use)
-               ktimer->expired_tscdeadline = ktimer->tscdeadline;
- 
--      if (!from_timer_fn && apic->apicv_active) {
-+      if (!from_timer_fn && apic->apicv_active && vcpu->wants_to_run) {
-               WARN_ON(kvm_get_running_vcpu() != vcpu);
-               kvm_apic_inject_pending_timer_irqs(apic);
-               return;

diff --git a/queue-6.1/series b/queue-6.1/series
index 37eee48b055356c2230516716109f3db4b546b57..bd3fdd805f90252a7dfbaf673f7aa90a38ce49c6 100644 (file)
--- a/queue-6.1/series
+++ b/queue-6.1/series
@@ -4,7 +4,6 @@ perf-x86-amd-brs-fix-kernel-address-leakage.patch
 seqlock-cure-some-more-scoped_seqlock-optimization-fails.patch
 seqlock-allow-kasan-to-fail-optimizing.patch
 seqlock-allow-ubsan_alignment-to-fail-optimizing.patch
-kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch
 kvm-nvmx-hide-shadow-vmcs-right-after-vmclear.patch
 kvm-x86-mmu-fix-use-after-free-on-vendor-module-reload.patch
 can-bcm-add-locking-when-updating-filter-and-timer-v.patch

diff --git a/queue-6.6/kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch b/queue-6.6/kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch
deleted file mode 100644 (file)
index f4542f2..0000000
--- a/queue-6.6/kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From e800decd9c0ac4349bcd8f8f9b29fd21fe93165e Mon Sep 17 00:00:00 2001
-From: Venkatesh Srinivas <venkateshs@chromium.org>
-Date: Wed, 15 Jul 2026 23:42:35 +0000
-Subject: KVM: x86: Only reset TSC Deadline Timer in apic_timer_expired on KVM_RUN
-
-From: Venkatesh Srinivas <venkateshs@chromium.org>
-
-commit e800decd9c0ac4349bcd8f8f9b29fd21fe93165e upstream.
-
-On Intel platforms with a VMX preemption timer and APICv, if a VMM
-calls KVM_GET_LAPIC before KVM_GET_MSRS to save the vCPU state, it is
-possible to lose a pending timer interrupt.
-
-If the thread running these ioctls is migrated to another core after
-calling KVM_GET_LAPIC but before KVM_GET_MSRS and the guest is using
-their LAPIC timer in TSC-deadline mode, not only does the save LAPIC
-state not carry the pending interrupt, the TSCDEADLINE MSR will be
-zeroed.
-
-After migration across CPUs, KVM_GET_MSRS calls vcpu_load, posting the
-interrupt and clearing the MSR:
-vcpu_load() ->
-  kvm_arch_vcpu_load() ->
-    kvm_lapic_restart_hv_timer() ->
-      start_hv_timer() ->
-        apic_timer_expired() ->
-          kvm_apic_inject_pending_timer_irqs()
-            . post interrupt into the LAPIC state
-            . clear IA32_TSCDEADLINE
-
-The saved LAPIC state will be missing the pending interrupt and the saved
-MSR will be zero. Oops.
-
-Fix by only posting an interrupt when we're attempting to enter the guest
-(vcpu->wants_to_run == true), not for vcpu_load from other paths.
-
-Assisted-by: gemini:gemini-3.1-pro-preview
-Debugged-by: David Matlack <dmatlack@google.com>
-Debugged-by: Sean Christopherson <seanjc@google.com>
-Debugged-by: Jim Mattson <jmattson@google.com>
-Debugged-by: James Houghton <jthoughton@google.com>
-Signed-off-by: Venkatesh Srinivas <venkateshs@chromium.org>
-Message-ID: <20260715234234.15382-2-venkateshs@chromium.org>
-Reviewed-by: James Houghton <jthoughton@google.com>
-Reviewed-by: Chao Gao <chao.gao@intel.com>
-Cc: stable@vger.kernel.org
-Fixes: ae95f566b3d2 ("KVM: X86: TSCDEADLINE MSR emulation fastpath", 2020-05-15)
-Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- arch/x86/kvm/lapic.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/x86/kvm/lapic.c
-+++ b/arch/x86/kvm/lapic.c
-@@ -1912,7 +1912,7 @@ static void apic_timer_expired(struct kv
-       if (apic_lvtt_tscdeadline(apic) || ktimer->hv_timer_in_use)
-               ktimer->expired_tscdeadline = ktimer->tscdeadline;
- 
--      if (!from_timer_fn && apic->apicv_active) {
-+      if (!from_timer_fn && apic->apicv_active && vcpu->wants_to_run) {
-               WARN_ON(kvm_get_running_vcpu() != vcpu);
-               kvm_apic_inject_pending_timer_irqs(apic);
-               return;

diff --git a/queue-6.6/series b/queue-6.6/series
index faa55462d02c3d08bab0beb054501db32ea1fd9e..008cb2be1309346a22cc1f5dcc6be9f2df38f997 100644 (file)
--- a/queue-6.6/series
+++ b/queue-6.6/series
@@ -8,7 +8,6 @@ seqlock-cure-some-more-scoped_seqlock-optimization-fails.patch
 seqlock-allow-kasan-to-fail-optimizing.patch
 seqlock-allow-ubsan_alignment-to-fail-optimizing.patch
 kvm-x86-check-for-invalid-obsolete-root-after-making-mmu-pages-available.patch
-kvm-x86-only-reset-tsc-deadline-timer-in-apic_timer_expired-on-kvm_run.patch
 kvm-nvmx-hide-shadow-vmcs-right-after-vmclear.patch
 kvm-x86-mmu-fix-use-after-free-on-vendor-module-reload.patch
 can-bcm-add-locking-when-updating-filter-and-timer-v.patch