drm/dp: Rename and relocate AS SDP payload field masks

The AS SDP payload field masks were misnamed and placed under the DPRX
feature enumeration list. These are not DPRX capability bits, but are
payload field masks for the Adaptive Sync SDP.

Relocate both masks next to the AS SDP definitions.
Update users to the corrected names. No functional change.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260428074457.3566918-2-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 86123614b7baea921308c8f981c873fc7ccb3ad0..ed17f6beae9a98e23eb2b7308d3d59b2fe8d2d3f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5374,8 +5374,8 @@ int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
        if ((sdp->sdp_header.HB3 & 0x3F) != 9)
                return -EINVAL;
 
-       as_sdp->length = sdp->sdp_header.HB3 & DP_ADAPTIVE_SYNC_SDP_LENGTH;
-       as_sdp->mode = sdp->db[0] & DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE;
+       as_sdp->length = sdp->sdp_header.HB3 & DP_AS_SDP_LENGTH_MASK;
+       as_sdp->mode = sdp->db[0] & DP_AS_SDP_OPERATION_MODE_MASK;
        as_sdp->vtotal = (sdp->db[2] << 8) | sdp->db[1];
        as_sdp->target_rr = (u64)sdp->db[3] | ((u64)sdp->db[4] & 0x3);
        as_sdp->target_rr_divider = sdp->db[4] & 0x20 ? true : false;

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 8b15d3eeb716a8e499cd6ac37d799e251cbc1730..4ea3b5b08a12547be8db7b15a6af84f16a9f1153 100644 (file)
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -1204,8 +1204,6 @@
 
 #define DP_DPRX_FEATURE_ENUMERATION_LIST_CONT_1         0x2214 /* 2.0 E11 */
 # define DP_ADAPTIVE_SYNC_SDP_SUPPORTED    (1 << 0)
-# define DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE           GENMASK(1, 0)
-# define DP_ADAPTIVE_SYNC_SDP_LENGTH                           GENMASK(5, 0)
 # define DP_AS_SDP_FIRST_HALF_LINE_OR_3840_PIXEL_CYCLE_WINDOW_NOT_SUPPORTED (1 << 1)
 # define DP_VSC_EXT_SDP_FRAMEWORK_VERSION_1_SUPPORTED  (1 << 4)
 
@@ -1870,4 +1868,7 @@ enum operation_mode {
        DP_AS_SDP_FAVT_TRR_REACHED = 0x03
 };
 
+#define DP_AS_SDP_OPERATION_MODE_MASK  GENMASK(1, 0)
+#define DP_AS_SDP_LENGTH_MASK          GENMASK(5, 0)
+
 #endif /* _DRM_DP_H_ */