]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ARM: dts: imx6ul-var-som: factor out audio support
authorHugo Villeneuve <hvilleneuve@dimonoff.com>
Thu, 5 Mar 2026 18:06:28 +0000 (13:06 -0500)
committerFrank Li <Frank.Li@nxp.com>
Mon, 4 May 2026 22:27:31 +0000 (18:27 -0400)
Not all boards use the audio codec, so factor out this functionality to a
separate dtsi.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm/boot/dts/nxp/imx/imx6ul-var-som-audio.dtsi [new file with mode: 0644]
arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi
arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-audio.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-audio.dtsi
new file mode 100644 (file)
index 0000000..3c480bc
--- /dev/null
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Audio support for Variscite VAR-SOM-6UL module.
+ *
+ * Copyright 2019-2024 Variscite Ltd.
+ * Copyright 2026 Dimonoff
+ */
+
+&iomuxc {
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
+                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
+                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x11088
+                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x11088
+                       MX6UL_PAD_JTAG_TMS__SAI2_MCLK           0x17088
+               >;
+       };
+};
+
+&sai2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai2>;
+       assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
+                         <&clks IMX6UL_CLK_SAI2>;
+       assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <0>, <12288000>;
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
index 70d19eccddb4ce02f6733578e82427b8f8fdf6a6..5600eeaa5854dc6db77a65aed69b9701acd0887e 100644 (file)
                >;
        };
 
-       pinctrl_sai2: sai2grp {
-               fsl,pins = <
-                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
-                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
-                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x11088
-                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x11088
-                       MX6UL_PAD_JTAG_TMS__SAI2_MCLK           0x17088
-               >;
-       };
-
        pinctrl_tsc: tscgrp {
                fsl,pins = <
                        MX6UL_PAD_GPIO1_IO01__GPIO1_IO01        0xb0
        status = "okay";
 };
 
-&sai2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_sai2>;
-       assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
-                         <&clks IMX6UL_CLK_SAI2>;
-       assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <0>, <12288000>;
-       fsl,sai-mclk-direction-output;
-       status = "okay";
-};
-
 &snvs_poweroff {
        status = "okay";
 };
index b5e6a3306e1cd64e5422b216bc2be76066aba9f5..64a3cbd8b7c38233c89450cadf394b0903a6e8e9 100644 (file)
@@ -13,6 +13,7 @@
 #include "imx6ul-var-som-wifi.dtsi"
 #include "imx6ul-var-som-enet2.dtsi"
 #include "imx6ul-var-som-enet1.dtsi"
+#include "imx6ul-var-som-audio.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)";
index 7eebb5b4f5e44c2ac2c6223bb69ea3efc8484457..9c5cb96beeb17047777e8a4b2e4522bca527ee4a 100644 (file)
@@ -13,6 +13,7 @@
 #include "imx6ul-var-som-concerto-common.dtsi"
 #include "imx6ul-var-som-sd.dtsi"
 #include "imx6ul-var-som-enet2.dtsi"
+#include "imx6ul-var-som-audio.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)";
index 86f558c76fb3e3c3871b9177cd12f2f5fe524e74..2e1f75d5f25a63269b3c720bdb184f8fc57b63ce 100644 (file)
@@ -13,6 +13,7 @@
 #include "imx6ul-var-som-wifi.dtsi"
 #include "imx6ul-var-som-enet2.dtsi"
 #include "imx6ul-var-som-enet1.dtsi"
+#include "imx6ul-var-som-audio.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)";
index 0d3e0d9b0f11d12ecc0881a7f640f6c3f8092b36..43a477db652fa70c53eaef87ea15360958c5cf4e 100644 (file)
@@ -12,6 +12,7 @@
 #include "imx6ul-var-som-concerto-common.dtsi"
 #include "imx6ul-var-som-sd.dtsi"
 #include "imx6ul-var-som-enet2.dtsi"
+#include "imx6ul-var-som-audio.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)";