]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: qcom: sm6350: add LPASS LPI pin controller
authorLuca Weiss <luca.weiss@fairphone.com>
Thu, 30 Apr 2026 07:10:44 +0000 (09:10 +0200)
committerBjorn Andersson <andersson@kernel.org>
Sun, 10 May 2026 02:35:18 +0000 (21:35 -0500)
Add LPASS LPI pinctrl node required for audio functionality on SM6350.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260430-sm6350-lpi-tlmm-v2-4-81d068025b97@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm6350.dtsi

index 034545d2af2d1c7f68bd0748f1c39b779d46b305..d6adf68563cb0bc37f2cf8906649a8b23ec02e87 100644 (file)
                        };
                };
 
+               lpass_tlmm: pinctrl@33c0000 {
+                       compatible = "qcom,sm6350-lpass-lpi-pinctrl";
+                       reg = <0x0 0x033c0000 0x0 0x20000>,
+                             <0x0 0x03550000 0x0 0x10000>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio-ranges = <&lpass_tlmm 0 0 15>;
+
+                       clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+                                <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+                       clock-names = "core",
+                                     "audio";
+
+                       i2s1_active: i2s1-active-state {
+                               clk-pins {
+                                       pins = "gpio6";
+                                       function = "i2s1_clk";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                                       output-high;
+                               };
+
+                               ws-pins {
+                                       pins = "gpio7";
+                                       function = "i2s1_ws";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                                       output-high;
+                               };
+
+                               data-pins {
+                                       pins = "gpio8", "gpio9";
+                                       function = "i2s1_data";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                                       output-high;
+                               };
+                       };
+
+                       i2s1_sleep: i2s1-sleep-state {
+                               clk-pins {
+                                       pins = "gpio6";
+                                       function = "i2s1_clk";
+                                       drive-strength = <2>;
+                                       bias-pull-down;
+                                       input-enable;
+                               };
+
+                               ws-pins {
+                                       pins = "gpio7";
+                                       function = "i2s1_ws";
+                                       drive-strength = <2>;
+                                       bias-pull-down;
+                                       input-enable;
+                               };
+
+                               data-pins {
+                                       pins = "gpio8", "gpio9";
+                                       function = "i2s1_data";
+                                       drive-strength = <2>;
+                                       bias-pull-down;
+                                       input-enable;
+                               };
+                       };
+               };
+
                gpu: gpu@3d00000 {
                        compatible = "qcom,adreno-619.0", "qcom,adreno";
                        reg = <0x0 0x03d00000 0x0 0x40000>,