arm64: dts: rockchip: Add frl-enable-gpios to rk3588 boards

The following RK3588 boards expose one or two GPIO pins to control the
voltage bias on the HDMI0 and/or HDMI1 data lines:

- rk3588-armsom-sige7
- rk3588-armsom-w3
- rk3588-coolpi-cm5-evb
- rk3588-coolpi-cm5-genbook
- rk3588-evb1-v10
- rk3588-evb2-v10
- rk3588-firefly-itx-3588j
- rk3588-friendlyelec-cm3588-nas
- rk3588-h96-max-v58
- rk3588-jaguar
- rk3588-mnt-reform2
- rk3588-nanopc-t6
- rk3588-orangepi-5-max
- rk3588-orangepi-5-plus
- rk3588-orangepi-5-ultra
- rk3588-roc-rt
- rk3588-rock-5-itx
- rk3588-rock-5b-5bp-5t
- rk3588-tiger

The pins must be asserted when operating in HDMI 2.1 FRL mode and
deasserted for HDMI 1.4/2.0 TMDS mode.

Wire up the hdmi0 and/or hdmi1 nodes to their dedicated GPIO pin(s) via
frl-enable-gpios to allow adjusting the bias when transitioning between
TMDS and FRL modes.

While at it, also ensure that pinctrl-names is present and ordered
alphabetically within the hdmi nodes.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-4-924df9db884a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
index 39197ee198370b8166c486052d1c4c95b3810afd..c4854c0f22e26b1f00393775b32639e1695e89cf 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
@@ -177,6 +177,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -347,6 +351,12 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts b/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts
index 6ad2759ddccafeef09d7c5d43e503ac8beb36dde..3bbafdd89ede81fa836abefa0342ca1315355a34 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts
@@ -162,6 +162,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -182,6 +186,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -330,6 +338,16 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
index 3d5c8b753208ab3c2ee1504404161be090f92be6..66e3c20d7b4f139332b3ae2bebbfef569ce134e9 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts
@@ -125,6 +125,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -145,8 +149,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda
+                    &hdmi1_tx_on_h>;
        pinctrl-names = "default";
-       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda>;
        status = "okay";
 };
 
@@ -211,6 +217,16 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        lcd {
                lcdpwr_en: lcdpwr-en {
                        rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
index 738637ecaf557f6f43f4b3e2b8106008c3a2f7f6..e05e6b2d513673be14c4b46a87df2c248b31be19 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
@@ -184,7 +184,10 @@
 
 /* HDMI CEC is not used */
 &hdmi0 {
-       pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>;
+       frl-enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda
+                    &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -277,6 +280,12 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        lcd {
                lcdpwr_en: lcdpwr-en {
                        rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
index 09bc7b68dcc057d1cc1c0c72b0778bc743c1acad..977849bfd509182b9869fd5e6dfe519d357e768a 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -360,6 +360,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -376,6 +380,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -612,6 +620,16 @@
 
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hdmirx {
                hdmirx_hpd: hdmirx-5v-detection {
                        rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts
index 60ba6ac55b239939c905638e2c87ff3fce63983d..b7d2cb4561484b2a41e49196c00b5ae8127adf12 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts
@@ -143,6 +143,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -183,6 +187,12 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts b/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts
index e086114c7634874eb1eed6bd03bd6d0b587a269c..e43afb0c53fbdb0e4c8d54503c588cc86bb238e0 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts
@@ -322,6 +322,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -487,6 +491,12 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts
index 10a7d3691a26f837d074c580082489264dc2fa1e..0dce96ca8c288edc9249fa6b3ef33f43d8b77363 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts
@@ -331,6 +331,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -347,6 +351,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -520,6 +528,16 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hdmirx {
                hdmirx_hpd: hdmirx-5v-detection {
                        rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts b/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts
index 73d8ce4fde2b8144b2e9cf4854e759141c20f119..7c2a1e6bcff9b15a7ce4ee82576528898cbda55c 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts
@@ -210,6 +210,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -339,6 +343,12 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
index 5f5d89a33a4ae76217d0c0c16313188fb76ed2a2..05b524f682cf6d6cbe2a852ee9ed39148ee41a85 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
@@ -278,8 +278,10 @@
 
 &hdmi0 {
        /* No CEC on Jaguar */
+       frl-enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda
+                    &hdmi0_tx_on_h>;
        pinctrl-names = "default";
-       pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>;
        status = "okay";
 };
 
@@ -571,6 +573,12 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        leds {
                led1_pin: led1-pin {
                        rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
index 78a4e896f665b5786dd2bf64650f3c693521219e..36a5977d07952015c225d8f944c7110958518bd6 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
@@ -148,6 +148,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -205,6 +209,12 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pcie2 {
                pcie2_0_rst: pcie2-0-rst {
                        rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index 84b6b53f016ab1f770ef637b70dc323ec21a6213..3b0903d0e3e2a6800b9cbc6117cf302886d8bff5 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -361,6 +361,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -381,6 +385,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -682,6 +690,16 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hdmirx {
                hdmirx_hpd: hdmirx-5v-detection {
                        rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts
index 8b1d35760c3bc918c7ddf35bcd070c9ba17b2818..762f9fd966a42b0817a6a8b685ab744c773b3141 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts
@@ -35,6 +35,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -55,9 +59,10 @@
 };
 
 &hdmi1 {
-       pinctrl-names = "default";
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
-                            &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+                            &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -102,6 +107,15 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
 
        usb {
                usb_otg_pwren: usb-otg-pwren {

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
index 9950d1147e129dc866cfde62ddd636b082ae1926..7142938d297146ce2c070012960bb168dfae6799 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
@@ -121,6 +121,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -141,6 +145,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -278,6 +286,16 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts
index f8c6c080e418dbd529ab0936407d0e7cdb52eb71..2b693dfb434c4eefebd584461b7f851d5e7c914e 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts
@@ -25,9 +25,10 @@
 };
 
 &hdmi1 {
-       pinctrl-names = "default";
+       frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
-                            &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+                            &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -64,6 +65,12 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        usb {
                usb_otg_pwren: usb-otg-pwren {
                        rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts b/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts
index 2d6fed2a84a38de4d4810ccd2275edfbc2e87613..c50217a7b5596bd8b16e1b7a3fbb30cbfd4867f1 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts
@@ -325,6 +325,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -345,6 +349,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -583,6 +591,16 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
index 1ff786251eb061722f303d0507156d247bc9b32f..8473f3e90354b918d8b37d6186eeb1bba99d42ae 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
@@ -346,8 +346,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
-                    &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -699,6 +701,12 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                rtc_int: rtc-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
index bf4a1d2e55ca30b0a4fedcac00a463119a152821..b2ca041b8e8b2eb3a6a8f872e76222b17d2920ab 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
@@ -183,6 +183,10 @@
 };
 
 &hdmi0 {
+       frl-enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>;
+       pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+                    &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -203,8 +207,10 @@
 };
 
 &hdmi1 {
+       frl-enable-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
-                    &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+                    &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>;
+       pinctrl-names = "default";
        status = "okay";
 };
 
@@ -505,6 +511,16 @@
 };
 
 &pinctrl {
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               hdmi1_tx_on_h: hdmi1-tx-on-h {
+                       rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        hym8563 {
                hym8563_int: hym8563-int {
                        rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
index caa43d1abf179365d37a244ea374b0dae39b0433..08b7d477d8dbc424d76dae5b64376ade03e55556 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
@@ -172,8 +172,9 @@
         * While HDMI-CEC is present on the Q7 connector, it is not
         * connected on Haikou itself.
         */
+       pinctrl-0 = <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda
+                    &hdmi0_tx_on_h>;
        pinctrl-names = "default";
-       pinctrl-0 = <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
index a0e97481afb7d73fc2f0c1990f3e86546f6cff4f..ea5c264d153719030a2dcf0af2ddcfaa03f7e37e 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
@@ -148,9 +148,10 @@
 };
 
 &hdmi0 {
-       pinctrl-names = "default";
+       frl-enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
        pinctrl-0 = <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl
-                    &hdmim1_tx0_sda>;
+                    &hdmim1_tx0_sda &hdmi0_tx_on_h>;
+       pinctrl-names = "default";
 };
 
 &i2c1 {
@@ -349,6 +350,12 @@
                };
        };
 
+       hdmi {
+               hdmi0_tx_on_h: hdmi0-tx-on-h {
+                       rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        leds {
                module_led_pin: module-led-pin {
                        rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;