]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx93: Add imx93w.dtsi for i.MX93 Wireless SiP
authorSherry Sun <sherry.sun@nxp.com>
Wed, 4 Feb 2026 08:35:50 +0000 (16:35 +0800)
committerFrank Li <Frank.Li@nxp.com>
Tue, 24 Feb 2026 20:24:35 +0000 (15:24 -0500)
Introduce imx93w.dtsi to describe the new NXP i.MX93 Wireless SiP, which
integrates the i.MX93 application processor with the NXP IW610 WLCSP
(Wi-Fi + Bluetooth LE + 802.15.4) connectivity device.

The new imx93w.dtsi is based on imx93.dtsi and adds the pieces required
for the internal connection between i.MX93 and IW610 inside the SiP.
This includes USDHC3 which is used as the host interface to the IW610
and the required GPIO settings(e.g. WL_RST, WL_REG_ON, etc.).

These nodes reflect internal SiP wiring and are not board specific, so
they are placed in a dedicated imx93w.dtsi file that can be reused by
multiple boards adopting the i.MX93 Wireless SiP.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/imx93w.dtsi [new file with mode: 0644]

diff --git a/arch/arm64/boot/dts/freescale/imx93w.dtsi b/arch/arm64/boot/dts/freescale/imx93w.dtsi
new file mode 100644 (file)
index 0000000..95fb025
--- /dev/null
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 NXP
+ */
+
+#include "imx93.dtsi"
+
+/ {
+       aliases {
+               mmc2 = &usdhc3;
+       };
+
+       reg_usdhc3_vmmc: regulator-usdhc3 {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_usdhc3_vmmc>;
+               regulator-name = "WLAN_EN";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       usdhc3_pwrseq: usdhc3_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usdhc3_pwrseq>;
+               reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+       };
+};
+
+&usdhc3 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       pinctrl-3 = <&pinctrl_usdhc3_sleep>;
+       mmc-pwrseq = <&usdhc3_pwrseq>;
+       vmmc-supply = <&reg_usdhc3_vmmc>;
+       bus-width = <4>;
+       keep-power-in-suspend;
+       non-removable;
+       wakeup-source;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_reg_usdhc3_vmmc: regusdhc3vmmcgrp {
+               fsl,pins = <
+                       /*
+                        * Enable open drain and internal pull-up to allow the IW610 JTAG
+                        * connector to control the PDn status.
+                        */
+                       MX93_PAD_GPIO_IO29__GPIO2_IO29                  0xb9e
+               >;
+       };
+
+       /* need to config the SION for data and cmd pad, refer to ERR052021 */
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX93_PAD_SD3_CLK__USDHC3_CLK            0x1582
+                       MX93_PAD_SD3_CMD__USDHC3_CMD            0x40001382
+                       MX93_PAD_SD3_DATA0__USDHC3_DATA0        0x40001382
+                       MX93_PAD_SD3_DATA1__USDHC3_DATA1        0x40001382
+                       MX93_PAD_SD3_DATA2__USDHC3_DATA2        0x40001382
+                       MX93_PAD_SD3_DATA3__USDHC3_DATA3        0x40001382
+               >;
+       };
+
+       /* need to config the SION for data and cmd pad, refer to ERR052021 */
+       pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+               fsl,pins = <
+                       MX93_PAD_SD3_CLK__USDHC3_CLK            0x158e
+                       MX93_PAD_SD3_CMD__USDHC3_CMD            0x4000138e
+                       MX93_PAD_SD3_DATA0__USDHC3_DATA0        0x4000138e
+                       MX93_PAD_SD3_DATA1__USDHC3_DATA1        0x4000138e
+                       MX93_PAD_SD3_DATA2__USDHC3_DATA2        0x4000138e
+                       MX93_PAD_SD3_DATA3__USDHC3_DATA3        0x4000138e
+               >;
+       };
+
+       /* need to config the SION for data and cmd pad, refer to ERR052021 */
+       pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+               fsl,pins = <
+                       MX93_PAD_SD3_CLK__USDHC3_CLK            0x15fe
+                       MX93_PAD_SD3_CMD__USDHC3_CMD            0x400013fe
+                       MX93_PAD_SD3_DATA0__USDHC3_DATA0        0x400013fe
+                       MX93_PAD_SD3_DATA1__USDHC3_DATA1        0x400013fe
+                       MX93_PAD_SD3_DATA2__USDHC3_DATA2        0x400013fe
+                       MX93_PAD_SD3_DATA3__USDHC3_DATA3        0x400013fe
+               >;
+       };
+
+       pinctrl_usdhc3_sleep: usdhc3grpsleepgrp {
+               fsl,pins = <
+                       MX93_PAD_SD3_CLK__GPIO3_IO20            0x31e
+                       MX93_PAD_SD3_CMD__GPIO3_IO21            0x31e
+                       MX93_PAD_SD3_DATA0__GPIO3_IO22          0x31e
+                       MX93_PAD_SD3_DATA1__GPIO3_IO23          0x31e
+                       MX93_PAD_SD3_DATA2__GPIO3_IO24          0x31e
+                       MX93_PAD_SD3_DATA3__GPIO3_IO25          0x31e
+               >;
+       };
+
+       pinctrl_usdhc3_pwrseq: usdhc3pwrseqgrp {
+               fsl,pins = <
+                       MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10            0x39e
+               >;
+       };
+};