LoongArch: Fix build errors due to wrong instructions for 32BIT

In some assembly files there are some instructions that only valid for
64BIT, but those files can be compiled for 32BIT and cause build errors.

So, replace those instructions with macros:
li.d --> LONG_LI (li.w or li.d), addi.d --> PTR_ADDI (addi.w or addi.d).

BTW, Re-tab the indention in the assembly files for alignment.

Cc: stable@vger.kernel.org # 6.19+
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>

diff --git a/arch/loongarch/kernel/rethook_trampoline.S b/arch/loongarch/kernel/rethook_trampoline.S
index d4ceb2fa2a5ce46372539126da4b3a777b621802..2e009fbea53f2dbd2e095800380337af2a92200a 100644 (file)
--- a/arch/loongarch/kernel/rethook_trampoline.S
+++ b/arch/loongarch/kernel/rethook_trampoline.S
@@ -71,27 +71,27 @@
        cfi_ld  s7, PT_R30
        cfi_ld  s8, PT_R31
        LONG_L  t0, sp, PT_CRMD
-       li.d    t1, 0x7 /* mask bit[1:0] PLV, bit[2] IE */
+       LONG_LI t1, 0x7 /* mask bit[1:0] PLV, bit[2] IE */
        csrxchg t0, t1, LOONGARCH_CSR_CRMD
        .endm
 
 SYM_CODE_START(arch_rethook_trampoline)
        UNWIND_HINT_UNDEFINED
-       addi.d  sp, sp, -PT_SIZE
+       PTR_ADDI sp, sp, -PT_SIZE
        save_all_base_regs
 
-       addi.d  t0, sp, PT_SIZE
-       LONG_S  t0, sp, PT_R3
+       PTR_ADDI t0, sp, PT_SIZE
+       LONG_S   t0, sp, PT_R3
 
-       move a0, sp /* pt_regs */
+       move     a0, sp /* pt_regs */
 
-       bl arch_rethook_trampoline_callback
+       bl       arch_rethook_trampoline_callback
 
        /* use the result as the return-address */
-       move ra, a0
+       move     ra, a0
 
        restore_all_base_regs
-       addi.d  sp, sp, PT_SIZE
+       PTR_ADDI sp, sp, PT_SIZE
 
-       jr ra
+       jr       ra
 SYM_CODE_END(arch_rethook_trampoline)