]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: cix: Add CPU idle states for Sky1
authorDevin Li <Devin.Li@cixtech.com>
Thu, 7 May 2026 06:59:56 +0000 (14:59 +0800)
committerPeter Chen <peter.chen@cixtech.com>
Mon, 11 May 2026 03:36:40 +0000 (11:36 +0800)
Add PSCI-based CPU idle state definitions for the Sky1 SoC,
enabling core and cluster level power management through
ARM PSCI firmware.

Three idle states are defined:

- CPU_SLEEP_0: Core idle state for A520 cores
  (psci-suspend-param 0x0010000), entry-latency 34us,
  exit-latency 100us

- CPU_SLEEP_1: Core idle state for A720 cores
  (psci-suspend-param 0x10000), entry-latency 31us,
  exit-latency 79us

- CLUSTER_SLEEP_0: Cluster idle state shared by all cores
  (psci-suspend-param 0x1010000), entry-latency 41us,
  exit-latency 104us

A520 cores (cpu0-3) reference CPU_SLEEP_0 and CLUSTER_SLEEP_0,
while A720 cores (cpu4-11) reference CPU_SLEEP_1 and
CLUSTER_SLEEP_0.

Signed-off-by: Devin Li <Devin.Li@cixtech.com>
Link: https://lore.kernel.org/r/20260507065956.3900087-1-Devin.Li@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
arch/arm64/boot/dts/cix/sky1.dtsi

index 9f80e1aa070a0eec4225058bcc6dbd0089f359ac..a77c52296ebd30c2e3c13cd633b5ebf2cacd1efb 100644 (file)
@@ -25,6 +25,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                cpu1: cpu@100 {
@@ -35,6 +36,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                cpu2: cpu@200 {
@@ -45,6 +47,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                cpu3: cpu@300 {
@@ -55,6 +58,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <403>;
+                       cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
                };
 
                cpu4: cpu@400 {
@@ -65,6 +69,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu5: cpu@500 {
@@ -75,6 +80,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu6: cpu@600 {
@@ -85,6 +91,7 @@
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu7: cpu@700 {
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu8: cpu@800 {
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu9: cpu@900 {
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu10: cpu@a00 {
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu11: cpu@b00 {
                        power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>;
                        power-domain-names = "perf";
                        capacity-dmips-mhz = <1024>;
+                       cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>;
                };
 
                cpu-map {
                                };
                        };
                };
+
+               idle-states {
+                       CPU_SLEEP_0: cpu-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <34>;
+                               exit-latency-us = <100>;
+                               min-residency-us = <3000>;
+                       };
+
+                       CPU_SLEEP_1: cpu-sleep-1 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0010000>;
+                               local-timer-stop;
+                               entry-latency-us = <31>;
+                               exit-latency-us = <79>;
+                               min-residency-us = <3000>;
+                       };
+
+                       CLUSTER_SLEEP_0: cluster-sleep-0 {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x1010000>;
+                               local-timer-stop;
+                               entry-latency-us = <41>;
+                               exit-latency-us = <104>;
+                               min-residency-us = <4000>;
+                       };
+               };
        };
 
        firmware {