KVM: arm64: vgic: Rationalise per-CPU irq accessor

Despite adding the necessary infrastructure to identify irq types,
vgic_get_vcpu_irq() treats GICv5 PPIs in a special way, which
impairs the readability of the code.

Use the existing irq classifiers to handle per-CPU irqs for all
vgic types, and let the normal control flow reach global interrupt
handling without any v5-specific path.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Link: https://lore.kernel.org/r/20260520091949.542365-9-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c
index 3ac6d49bc4876a6bb4bfdb4b4c896dff13b8759c..b697678d68b010ea7f99b662a0c808490d691be2 100644 (file)
--- a/arch/arm64/kvm/vgic/vgic.c
+++ b/arch/arm64/kvm/vgic/vgic.c
@@ -106,24 +106,23 @@ struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid)
 
 struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid)
 {
+       enum kvm_device_type type;
+
        if (WARN_ON(!vcpu))
                return NULL;
 
-       if (vgic_is_v5(vcpu->kvm)) {
-               u32 int_num, hwirq_id;
-
-               if (!__irq_is_ppi(KVM_DEV_TYPE_ARM_VGIC_V5, intid))
-                       return NULL;
-
-               hwirq_id = FIELD_GET(GICV5_HWIRQ_ID, intid);
-               int_num = array_index_nospec(hwirq_id, VGIC_V5_NR_PRIVATE_IRQS);
+       type = vcpu->kvm->arch.vgic.vgic_model;
 
-               return &vcpu->arch.vgic_cpu.private_irqs[int_num];
-       }
+       if (__irq_is_sgi(type, intid) || __irq_is_ppi(type, intid)) {
+               switch (type) {
+               case KVM_DEV_TYPE_ARM_VGIC_V5:
+                       intid = vgic_v5_get_hwirq_id(intid);
+                       intid = array_index_nospec(intid, VGIC_V5_NR_PRIVATE_IRQS);
+                       break;
+               default:
+                       intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS);
+               }
 
-       /* SGIs and PPIs */
-       if (intid < VGIC_NR_PRIVATE_IRQS) {
-               intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS);
                return &vcpu->arch.vgic_cpu.private_irqs[intid];
        }