]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Track PTL disable requests by source
authorPerry Yuan <perry.yuan@amd.com>
Sun, 8 Feb 2026 16:42:09 +0000 (00:42 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 11 May 2026 19:55:56 +0000 (15:55 -0400)
Use a bitmap to track PTL disable requests from sysfs and profiler.
PTL is only re-enabled once all sources have released their disable
requests, avoiding premature enablement.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
drivers/gpu/drm/amd/include/amdgpu_ptl.h

index 82c96f578a82dac8e9cc7c7aafaa6c54ff2467d2..78a9ce0eb60e4615e9fb0e25f2226d1ce577e3a6 100644 (file)
@@ -1318,6 +1318,21 @@ int amdgpu_ptl_perf_monitor_ctrl(struct amdgpu_device *adev, u32 req_code,
                        ptl->fmt2 == ptl_fmt2)
                return 0;
 
+       /* If enabling PTL, check disable bitmap */
+       if (req_code == PSP_PTL_PERF_MON_SET && *ptl_state == 1) {
+               if (!bitmap_empty(ptl->disable_bitmap,
+                                       AMDGPU_PTL_DISABLE_MAX)) {
+                       dev_dbg(adev->dev,
+                                       "PTL enable blocked: SYSFS=%d, PROFILER=%d (ref=%d)\n",
+                                       test_bit(AMDGPU_PTL_DISABLE_SYSFS,
+                                               ptl->disable_bitmap),
+                                       test_bit(AMDGPU_PTL_DISABLE_PROFILER,
+                                               ptl->disable_bitmap),
+                                       atomic_read(&ptl->disable_ref));
+                       return 0;
+               }
+       }
+
        return psp_ptl_invoke(psp, req_code, ptl_state, &ptl_fmt1, &ptl_fmt2);
 }
 
@@ -1359,6 +1374,7 @@ static ssize_t ptl_enable_store(struct device *dev,
        uint32_t ptl_state, fmt1, fmt2;
        int ret;
        bool enable;
+       bool bit_changed = false;
 
        mutex_lock(&ptl->mutex);
        if (sysfs_streq(buf, "enabled") || sysfs_streq(buf, "1")) {
@@ -1374,14 +1390,24 @@ static ssize_t ptl_enable_store(struct device *dev,
        fmt2 = ptl->fmt2;
        ptl_state = enable ? 1 : 0;
 
+       if (enable)
+               bit_changed = test_and_clear_bit(AMDGPU_PTL_DISABLE_SYSFS,
+                               ptl->disable_bitmap);
+
        ret = amdgpu_ptl_perf_monitor_ctrl(adev, PSP_PTL_PERF_MON_SET, &ptl_state, &fmt1, &fmt2);
        if (ret) {
                dev_err(adev->dev, "Failed to set PTL err = %d\n", ret);
+               if (enable && bit_changed)
+                       set_bit(AMDGPU_PTL_DISABLE_SYSFS, ptl->disable_bitmap);
                mutex_unlock(&ptl->mutex);
                return ret;
        }
 
+       if (!enable)
+               set_bit(AMDGPU_PTL_DISABLE_SYSFS, ptl->disable_bitmap);
+
        mutex_unlock(&ptl->mutex);
+
        return count;
 }
 
index 979650182431297c6c84cb667ca0aadf7ba3df97..575823f268498b5a401694e686957518c3da6457 100644 (file)
@@ -31,6 +31,7 @@
 #include "ta_ras_if.h"
 #include "ta_rap_if.h"
 #include "ta_secureDisplay_if.h"
+#include <linux/bitops.h>
 #include "amdgpu_ptl.h"
 
 #define PSP_FENCE_BUFFER_SIZE  0x1000
index bada73b48899cd70fdcb66d82a1317639a73b588..5bea583732cbb98ccd1de48c3352efff38cf813e 100644 (file)
@@ -1824,6 +1824,7 @@ int kfd_ptl_disable_request(struct kfd_process_device *pdd,
                        goto out;
                }
        }
+       set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap);
        pdd->ptl_disable_req = true;
 
 out:
@@ -1844,9 +1845,11 @@ int kfd_ptl_disable_release(struct kfd_process_device *pdd,
                goto out;
 
        if (atomic_dec_return(&ptl->disable_ref) == 0) {
+               clear_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap);
                ret = kfd_ptl_control(pdd, true);
                if (ret) {
                        atomic_inc(&ptl->disable_ref);
+                       set_bit(AMDGPU_PTL_DISABLE_PROFILER, ptl->disable_bitmap);
                        dev_warn(adev->dev, "Failed to enable PTL on release: %d\n", ret);
                        goto out;
                }
index 9e63a9a9680afb05c8d5c2613b39c2c458b9d2e9..568b6944e1ad12feede16f3e3265d1ceb5de7b9c 100644 (file)
@@ -34,6 +34,11 @@ enum amdgpu_ptl_fmt {
        AMDGPU_PTL_FMT_INVALID = 7,
 };
 
+enum amdgpu_ptl_disable_source {
+       AMDGPU_PTL_DISABLE_SYSFS = 0,
+       AMDGPU_PTL_DISABLE_PROFILER,
+       AMDGPU_PTL_DISABLE_MAX,
+};
 struct amdgpu_ptl {
        enum amdgpu_ptl_fmt             fmt1;
        enum amdgpu_ptl_fmt             fmt2;
@@ -42,6 +47,7 @@ struct amdgpu_ptl {
        /* PTL disable reference counting */
        atomic_t                        disable_ref;
        struct mutex                    mutex;
+       DECLARE_BITMAP(disable_bitmap, AMDGPU_PTL_DISABLE_MAX);
 };
 
 int amdgpu_ptl_perf_monitor_ctrl(struct amdgpu_device *adev, u32 req_code,