drm/msm/adreno: use qcom_ubwc_version_tag() helper

Use new helper defined to program UBWC version to the hardware.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/726485/
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-5-72f2749bc807@oss.qualcomm.com

diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c
index ccfccc45133fda53168d3475ebd3d543f10268af..1923f904d37dc957207c65323e23e1e143799f86 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c
@@ -282,35 +282,33 @@ static void a8xx_set_ubwc_config(struct msm_gpu *gpu)
        bool rgb565_predicator = false, amsbc = false;
        bool ubwc_mode = qcom_ubwc_get_ubwc_mode(cfg);
        u32 ubwc_version = cfg->ubwc_enc_version;
-       u32 hbb, hbb_hi, hbb_lo, mode = 1;
+       u32 hbb, hbb_hi, hbb_lo, mode;
        u8 uavflagprd_inv = 2;
 
        switch (ubwc_version) {
        case UBWC_6_0:
                yuvnotcomptofc = true;
-               mode = 5;
                break;
        case UBWC_5_0:
                amsbc = true;
                rgb565_predicator = true;
-               mode = 4;
                break;
        case UBWC_4_0:
                amsbc = true;
                rgb565_predicator = true;
                fp16compoptdis = true;
                rgba8888_lossless = true;
-               mode = 2;
                break;
        case UBWC_3_0:
                amsbc = true;
-               mode = 1;
                break;
        default:
                dev_err(&gpu->pdev->dev, "Unknown UBWC version: 0x%x\n", ubwc_version);
                break;
        }
 
+       mode = qcom_ubwc_version_tag(cfg);
+
        /*
         * We subtract 13 from the highest bank bit (13 is the minimum value
         * allowed by hw) and write the lowest two bits of the remaining value