drm/amd/display: remove watermark range notify

[Why & How]
dcn42 only use one set of watermark A,
driver always update set A runtime.
no need to notify pmfw the clock range.

Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: James Lin <pinglei.lin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
index a0cdaf69056e191fca43ea55366326b0b30d968b..c4ed6c3594c28bde5ffd56df3d13b58e5ba15ce9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
@@ -1020,7 +1020,7 @@ static struct clk_mgr_funcs dcn42_funcs = {
        .init_clocks = dcn42_init_clocks,
        .enable_pme_wa = dcn42_enable_pme_wa,
        .are_clock_states_equal = dcn42_are_clock_states_equal,
-       .notify_wm_ranges = dcn42_notify_wm_ranges,
+       .notify_wm_ranges = NULL,
        .set_low_power_state = dcn42_set_low_power_state,
        .exit_low_power_state = dcn42_exit_low_power_state,
        .get_max_clock_khz = dcn42_get_max_clock_khz,