drm/v3d: Wait for pending L2T flush before cleaning caches

v3d_clean_caches() starts the cache-clean sequence by writing
V3D_L2TCACTL_TMUWCF to V3D_CTL_L2TCACTL and then polling for that bit to
clear. It does not, however, check for an L2T flush (L2TFLS) that may
still be in flight from a previous operation.

On pre-V3D 7.1 hardware, kicking off the TMU write-combiner flush while an
L2T flush is still pending can clobber bits in L2TCACTL and cause cache
inconsistencies.

Poll for L2TFLS to clear before writing L2TCACTL on V3D < 7.1, ensuring
any pending flush has completed before a new clean is issued.

Cc: stable@vger.kernel.org
Fixes: d223f98f0209 ("drm/v3d: Add support for compute shader dispatch.")
Link: https://patch.msgid.link/20260530-v3d-fix-rpi4-freezes-v1-1-c2c8307da6ce@igalia.com
Signed-off-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
index 75d9eccd796664e67277c1f83ad59063f164d1da..dd7da419702fc801275e952c07ef44ce4b90516d 100644 (file)
--- a/drivers/gpu/drm/v3d/v3d_gem.c
+++ b/drivers/gpu/drm/v3d/v3d_gem.c
@@ -213,6 +213,14 @@ v3d_clean_caches(struct v3d_dev *v3d)
 
        trace_v3d_cache_clean_begin(dev);
 
+       /* GFXH-1897: Ensure pending flushes complete before writing L2TCACTL */
+       if (v3d->ver < V3D_GEN_71) {
+               if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
+                              V3D_L2TCACTL_L2TFLS), 100)) {
+                       drm_err(dev, "Timeout waiting for L2T clean\n");
+               }
+       }
+
        V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
        if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
                       V3D_L2TCACTL_TMUWCF), 100)) {