coresight: etm4x: Set active path on target CPU

Set the path pointer on the target CPU during ETM enable and disable.

This ensures the device mode and path pointer are updated together and
observed atomically by the CPU PM notifier.

Tested-by: James Clark <james.clark@linaro.org>
Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Tested-by: Jie Gan <jie.gan@oss.qualcomm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20260515-arm_coresight_path_power_management_improvement-v14-20-f88c4a3ecfe9@arm.com

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index fef1270439e9d770fc0459e9ab8cab7cb40827ee..343ba9ce946a7ea3776c06d43364cdce823e2c80 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -238,6 +238,7 @@ void etm4_release_trace_id(struct etmv4_drvdata *drvdata)
 
 struct etm4_enable_arg {
        struct etmv4_drvdata *drvdata;
+       struct coresight_path *path;
        int rc;
 };
 
@@ -625,8 +626,12 @@ static void etm4_enable_sysfs_smp_call(void *info)
        arg->rc = etm4_enable_hw(arg->drvdata);
 
        /* The tracer didn't start */
-       if (arg->rc)
+       if (arg->rc) {
                coresight_set_mode(csdev, CS_MODE_DISABLED);
+               return;
+       }
+
+       csdev->path = arg->path;
 }
 
 /*
@@ -894,9 +899,13 @@ static int etm4_enable_perf(struct coresight_device *csdev,
 
 out:
        /* Failed to start tracer; roll back to DISABLED mode */
-       if (ret)
+       if (ret) {
                coresight_set_mode(csdev, CS_MODE_DISABLED);
-       return ret;
+               return ret;
+       }
+
+       csdev->path = path;
+       return 0;
 }
 
 static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_path *path)
@@ -926,6 +935,7 @@ static int etm4_enable_sysfs(struct coresight_device *csdev, struct coresight_pa
         * ensures that register writes occur when cpu is powered.
         */
        arg.drvdata = drvdata;
+       arg.path = path;
        ret = smp_call_function_single(drvdata->cpu,
                                       etm4_enable_sysfs_smp_call, &arg, 1);
        if (!ret)
@@ -1067,6 +1077,7 @@ static void etm4_disable_sysfs_smp_call(void *info)
 
        etm4_disable_hw(drvdata);
 
+       drvdata->csdev->path = NULL;
        coresight_set_mode(drvdata->csdev, CS_MODE_DISABLED);
 }
 
@@ -1096,6 +1107,7 @@ static int etm4_disable_perf(struct coresight_device *csdev,
        /* TRCVICTLR::SSSTATUS, bit[9] */
        filters->ssstatus = (control & BIT(9));
 
+       drvdata->csdev->path = NULL;
        coresight_set_mode(drvdata->csdev, CS_MODE_DISABLED);
 
        /*