]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
RDMA/bnxt_re: Update hwq depth for app allocated QPs
authorSriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>
Tue, 19 May 2026 15:00:37 +0000 (20:30 +0530)
committerJason Gunthorpe <jgg@nvidia.com>
Sun, 24 May 2026 15:32:21 +0000 (12:32 -0300)
The hwq depth shouldn't be computed using slots/round-up logic for
app allocated QPs, use the max_wqe value saved earlier.

Link: https://patch.msgid.link/r/20260519150041.7251-6-sriharsha.basavapatna@broadcom.com
Signed-off-by: Sriharsha Basavapatna <sriharsha.basavapatna@broadcom.com>
Reviewed-by: Selvin Xavier <selvin.xavier@broadcom.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/bnxt_re/ib_verbs.c

index 942148c2d9f07337ea887aa1d8062fe2074ff775..e0c98b3ec298275d9ce3fc9d7009b6dba1968750 100644 (file)
@@ -1346,7 +1346,7 @@ free_orrq_hwq:
        return rc;
 }
 
-static int bnxt_re_setup_qp_hwqs(struct bnxt_re_qp *qp)
+static int bnxt_re_setup_qp_hwqs(struct bnxt_re_qp *qp, bool fixed_que_attr)
 {
        struct bnxt_qplib_res *res = &qp->rdev->qplib_res;
        struct bnxt_qplib_qp *qplib_qp = &qp->qplib_qp;
@@ -1360,12 +1360,17 @@ static int bnxt_re_setup_qp_hwqs(struct bnxt_re_qp *qp)
        hwq_attr.res = res;
        hwq_attr.sginfo = &sq->sg_info;
        hwq_attr.stride = bnxt_qplib_get_stride();
-       hwq_attr.depth = bnxt_qplib_get_depth(sq, wqe_mode, true);
        hwq_attr.aux_stride = qplib_qp->psn_sz;
-       hwq_attr.aux_depth = (qplib_qp->psn_sz) ?
-               bnxt_qplib_set_sq_size(sq, wqe_mode) : 0;
-       if (qplib_qp->is_host_msn_tbl && qplib_qp->psn_sz)
+       if (!fixed_que_attr) {
+               hwq_attr.depth = bnxt_qplib_get_depth(sq, wqe_mode, true);
+               hwq_attr.aux_depth = (qplib_qp->psn_sz) ?
+                               bnxt_qplib_set_sq_size(sq, wqe_mode) : 0;
+               if (qplib_qp->is_host_msn_tbl && qplib_qp->psn_sz)
+                       hwq_attr.aux_depth = qplib_qp->msn_tbl_sz;
+       } else {
+               hwq_attr.depth = sq->max_wqe;
                hwq_attr.aux_depth = qplib_qp->msn_tbl_sz;
+       }
        hwq_attr.type = HWQ_TYPE_QUEUE;
        rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
        if (rc)
@@ -1376,6 +1381,9 @@ static int bnxt_re_setup_qp_hwqs(struct bnxt_re_qp *qp)
                      CMDQ_CREATE_QP_SQ_LVL_SFT);
        sq->hwq.pg_sz_lvl = pg_sz_lvl;
 
+       if (qplib_qp->srq)
+               goto done;
+
        hwq_attr.res = res;
        hwq_attr.sginfo = &rq->sg_info;
        hwq_attr.stride = bnxt_qplib_get_stride();
@@ -1392,6 +1400,7 @@ static int bnxt_re_setup_qp_hwqs(struct bnxt_re_qp *qp)
                      CMDQ_CREATE_QP_RQ_LVL_SFT);
        rq->hwq.pg_sz_lvl = pg_sz_lvl;
 
+done:
        if (qplib_qp->psn_sz) {
                rc = bnxt_re_qp_alloc_init_xrrq(qp);
                if (rc)
@@ -1460,7 +1469,7 @@ static struct bnxt_re_qp *bnxt_re_create_shadow_qp
        qp->qplib_qp.rq_hdr_buf_size = BNXT_QPLIB_MAX_GRH_HDR_SIZE_IPV6;
        qp->qplib_qp.dpi = &rdev->dpi_privileged;
 
-       rc = bnxt_re_setup_qp_hwqs(qp);
+       rc = bnxt_re_setup_qp_hwqs(qp, false);
        if (rc)
                goto fail;
 
@@ -1774,7 +1783,7 @@ static int bnxt_re_init_qp_attr(struct bnxt_re_qp *qp, struct bnxt_re_pd *pd,
 
        bnxt_re_qp_calculate_msn_psn_size(qp, fixed_que_attr, ureq);
 
-       rc = bnxt_re_setup_qp_hwqs(qp);
+       rc = bnxt_re_setup_qp_hwqs(qp, fixed_que_attr);
        if (rc)
                goto free_umem;