Expand RX packet statistics including coding type, spatial
diversity, and beamforming. These statistics are accumulated
per PHY and displayed in bb_info debugfs.
RX statistics output:
== RX General
LDPC: 190, BCC: 0, STBC: 0, SU_NON_BF: 0, SU_BF: 190, MU: 0
Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260429132625.1659182-7-pkshih@realtek.com
u32 t;
phy_ppdu->chan_idx = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_CH_IDX);
-
- if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) {
- phy_ppdu->ldpc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_LDPC);
- phy_ppdu->stbc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_STBC);
- }
+ phy_ppdu->ldpc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_LDPC);
+ phy_ppdu->stbc = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_STBC);
if (!phy_ppdu->hdr_2_en)
phy_ppdu->rx_path_en =
return;
phy_ppdu->rpl_avg = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_RSSI_AVG_FD);
+ phy_ppdu->su = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_SU);
phy_ppdu->ofdm.avg_snr = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_AVG_SNR);
phy_ppdu->ofdm.evm_max = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MAX);
phy_ppdu->ofdm.evm_min = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MIN);
+ phy_ppdu->bf = le32_get_bits(ie->w3, RTW89_PHY_STS_IE01_W3_BF);
phy_ppdu->ofdm.has = true;
/* sign conversion for S(12,2) */
if (desc_info->data_rate < RTW89_HW_RATE_NR)
pkt_stat->rx_rate_cnt[desc_info->data_rate]++;
+ if (phy_ppdu && phy_ppdu->ofdm.has) {
+ if (phy_ppdu->ldpc)
+ pkt_stat->rx.ldpc++;
+ else
+ pkt_stat->rx.bcc++;
+
+ if (phy_ppdu->stbc)
+ pkt_stat->rx.stbc++;
+
+ if (!phy_ppdu->su)
+ pkt_stat->rx.mu++;
+ else if (phy_ppdu->bf)
+ pkt_stat->rx.su_bf++;
+ else
+ pkt_stat->rx.su_non_bf++;
+ }
+
rtw89_traffic_stats_accu(rtwdev, rtwvif, skb, false, false);
out:
} ofdm;
bool has_data;
bool has_bcn;
+ bool su;
bool ldpc;
bool stbc;
+ bool bf;
bool to_self;
bool valid;
bool hdr_2_en;
u8 beacon_rate;
u32 beacon_len;
u32 rx_rate_cnt[RTW89_HW_RATE_NR];
+ struct {
+ u32 ldpc;
+ u32 bcc;
+ u32 stbc;
+ u32 su_bf;
+ u32 su_non_bf;
+ u32 mu;
+ } rx;
};
#define RTW89_BCN_TRACK_STAT_NR 32
char *buf, size_t bufsz)
{
const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
+ struct rtw89_pkt_stat *pkt_stat = &bb->last_pkt_stat;
const struct rtw89_physts_regs *physts = phy->physts;
struct rtw89_pmac_stat_info *pmac = &bb->pmac_stat;
struct rtw89_tx_stat_info *tx_stat = &bb->tx_stat;
tx_stat->common_ctrl[i], (i < reg_nr - 1) ? ", " : "");
p += scnprintf(p, end - p, "]\n\n");
+ p += scnprintf(p, end - p, "== RX General\n");
+ p += scnprintf(p, end - p,
+ "LDPC: %d, BCC: %d, STBC: %d, SU_NON_BF: %d, SU_BF: %d, MU: %d\n\n",
+ pkt_stat->rx.ldpc, pkt_stat->rx.bcc,
+ pkt_stat->rx.stbc, pkt_stat->rx.su_non_bf,
+ pkt_stat->rx.su_bf, pkt_stat->rx.mu);
+
p += scnprintf(p, end - p, "== RSSI/RX Rate\n");
p += rtw89_get_rx_pkt_stat(rtwdev, bb, p, end - p);
#define RTW89_PHY_STS_IE01_W2_AVG_SNR GENMASK(5, 0)
#define RTW89_PHY_STS_IE01_W2_EVM_MAX GENMASK(15, 8)
#define RTW89_PHY_STS_IE01_W2_EVM_MIN GENMASK(23, 16)
+#define RTW89_PHY_STS_IE01_W2_SU BIT(27)
#define RTW89_PHY_STS_IE01_W2_LDPC BIT(28)
#define RTW89_PHY_STS_IE01_W2_STBC BIT(30)
+#define RTW89_PHY_STS_IE01_W3_BF BIT(8)
struct rtw89_phy_sts_ie01_v2 {
__le32 w0;