arm64: dts: qcom: kodiak: Add power-domain and iface clk for ice node

Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
for its own resources. Before accessing ICE hardware during probe, to
avoid potential unclocked register access issues (when clk_ignore_unused
is not passed on the kernel command line), in addition to the 'core' clock
the 'iface' clock should also be turned on by the driver. This can only be
done if the GCC_UFS_PHY_GDSC power domain is enabled. Specify both the
GCC_UFS_PHY_GDSC power domain and the 'iface' clock in the ICE node for
kodiak.

Fixes: dfd5ee7b34bb7 ("arm64: dts: qcom: sc7280: Add inline crypto engine")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Tested-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260416-qcom_ice_power_and_clk_vote-v5-7-5ccf5d7e2846@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index c51beada8c7dec267fb956a59ba1461a523b3fcb..fa540d8c2615dc02d941eb16bc7253204c2750bd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -2579,7 +2579,11 @@
                        compatible = "qcom,sc7280-inline-crypto-engine",
                                     "qcom,inline-crypto-engine";
                        reg = <0 0x01d88000 0 0x18000>;
-                       clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+                       clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
+                                <&gcc GCC_UFS_PHY_AHB_CLK>;
+                       clock-names = "core",
+                                     "iface";
+                       power-domains = <&gcc GCC_UFS_PHY_GDSC>;
                };
 
                cryptobam: dma-controller@1dc4000 {