arm: dts: imx: Update watchdog nodes for dynamic base address lookup

Update watchdog device tree nodes to enable dynamic base address
retrieval for i.MX7ULP, i.MX8ULP, i.MX91, i.MX93, i.MX943, i.MX95 and
i.MX952. This allows the bootloader to obtain watchdog base addresses
from the device tree instead of using hardcoded values.

- imx7ulp: Add wdog2 node
- imx8ulp: Mark wdog3 available
- imx91/imx93: Add wdog4 and wdog5 nodes
	       Mark wdog3/wdog4/wdog5 available
- imx943: Add wdog4 node and mark wdog3/wdog4 available
- imx95/imx952: Add wdog4 node and mark wdog3/wdog4 available

Watchdog nodes are marked with "bootph-all" to ensure availability
during early boot stages when init_wdog() occurs.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/dts/imx7ulp-com-u-boot.dtsi b/arch/arm/dts/imx7ulp-com-u-boot.dtsi
index f6d34e1b635fabfefccbc15612043fbf06894427..e13bcfe45f44864d63de012a8dc1a0ac82f843af 100644 (file)
--- a/arch/arm/dts/imx7ulp-com-u-boot.dtsi
+++ b/arch/arm/dts/imx7ulp-com-u-boot.dtsi
@@ -3,6 +3,8 @@
  * Copyright 2019 Foundries.io
  */
 
+#include "imx7ulp-u-boot.dtsi"
+
 &iomuxc1 {
        bootph-pre-ram;
 };

diff --git a/arch/arm/dts/imx7ulp-evk-u-boot.dtsi b/arch/arm/dts/imx7ulp-evk-u-boot.dtsi
new file mode 100644 (file)
index 0000000..1944a02
--- /dev/null
+++ b/arch/arm/dts/imx7ulp-evk-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2026 NXP
+ */
+
+#include "imx7ulp-u-boot.dtsi"

diff --git a/arch/arm/dts/imx7ulp-u-boot.dtsi b/arch/arm/dts/imx7ulp-u-boot.dtsi
new file mode 100644 (file)
index 0000000..88cb571
--- /dev/null
+++ b/arch/arm/dts/imx7ulp-u-boot.dtsi
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2026 NXP
+ */
+
+&ahbbridge0 {
+       wdog2: watchdog@40430000 {
+               compatible = "fsl,imx7ulp-wdt";
+               reg = <0x40430000 0x10000>;
+               interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&pcc2 IMX7ULP_CLK_WDG2>;
+               assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG2>;
+               assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
+               timeout-sec = <40>;
+               status = "disabled";
+       };
+};

diff --git a/arch/arm/dts/imx8ulp-u-boot.dtsi b/arch/arm/dts/imx8ulp-u-boot.dtsi
index 30baaeff8efaec015dfc1ba2ffcaa59a65b1dfce..54ecbcf17959ff30ea2fe241c51fa2519be17c43 100644 (file)
--- a/arch/arm/dts/imx8ulp-u-boot.dtsi
+++ b/arch/arm/dts/imx8ulp-u-boot.dtsi
@@ -61,3 +61,7 @@
        };
 };
 #endif
+
+&wdog3 {
+       bootph-all;
+};

diff --git a/arch/arm/dts/imx91-u-boot.dtsi b/arch/arm/dts/imx91-u-boot.dtsi
index 5b639c965d632db79a5c9eb81866d7793d57e7af..149f7bc685a2eb1a90c110b0e2ae478cc74ada2c 100644 (file)
--- a/arch/arm/dts/imx91-u-boot.dtsi
+++ b/arch/arm/dts/imx91-u-boot.dtsi
@@ -90,3 +90,15 @@
                };
        };
 };
+
+&wdog3 {
+       bootph-all;
+};
+
+&wdog4 {
+       bootph-all;
+};
+
+&wdog5 {
+       bootph-all;
+};

diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi
index dc86746ac9096c3dd49d9f54873dbe0a3df19b44..a84cdf2bc4592286f9fcb3042c30539385c4ab1a 100644 (file)
--- a/arch/arm/dts/imx93-u-boot.dtsi
+++ b/arch/arm/dts/imx93-u-boot.dtsi
@@ -96,3 +96,15 @@
                               0x000001b2 0x800001b6>;
        #thermal-sensor-cells = <1>;
 };
+
+&wdog3 {
+       bootph-all;
+};
+
+&wdog4 {
+       bootph-all;
+};
+
+&wdog5 {
+       bootph-all;
+};

diff --git a/arch/arm/dts/imx943-u-boot.dtsi b/arch/arm/dts/imx943-u-boot.dtsi
index 8a7a6f1115815b898a7eadbe0c46e020b6771c70..74481aeefb5d9aee68aba13a5e6def5041604efb 100644 (file)
--- a/arch/arm/dts/imx943-u-boot.dtsi
+++ b/arch/arm/dts/imx943-u-boot.dtsi
@@ -159,6 +159,21 @@
        };
 };
 
+&aips4 {
+       bootph-all;
+
+       wdog4: watchdog@49230000 {
+               compatible = "fsl,imx94-wdt", "fsl,imx93-wdt";
+               reg = <0x49230000 0x10000>;
+               interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&scmi_clk IMX94_CLK_BUSWAKEUP>;
+               timeout-sec = <40>;
+               fsl,ext-reset-output;
+               status = "disabled";
+               bootph-all;
+       };
+};
+
 &clk_ext1 {
        bootph-all;
 };
@@ -442,3 +457,7 @@
 &sram0 {
        bootph-all;
 };
+
+&wdog3 {
+       bootph-all;
+};

diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi
index 6dec159752b7dbdf8ac9dc7f123d9cc60fec4401..cc67f09ed9725f58adfafd37049447ec14e89273 100644 (file)
--- a/arch/arm/dts/imx95-u-boot.dtsi
+++ b/arch/arm/dts/imx95-u-boot.dtsi
@@ -138,6 +138,16 @@
 
 &aips2 {
        bootph-all;
+
+       wdog4: watchdog@424a0000 {
+               compatible = "fsl,imx93-wdt";
+               reg = <0x424a0000 0x10000>;
+               interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>;
+               timeout-sec = <40>;
+               status = "disabled";
+               bootph-all;
+       };
 };
 
 &aips3 {
@@ -238,3 +248,7 @@
 &scmi_buf1 {
        bootph-all;
 };
+
+&wdog3 {
+       bootph-all;
+};

diff --git a/arch/arm/dts/imx952-u-boot.dtsi b/arch/arm/dts/imx952-u-boot.dtsi
index e977014992ebde8b96047510b4216b6b34c65fa2..28f47244356869413e9779dd38e5a7af2e416a4e 100644 (file)
--- a/arch/arm/dts/imx952-u-boot.dtsi
+++ b/arch/arm/dts/imx952-u-boot.dtsi
@@ -115,6 +115,16 @@
 
 &aips2 {
        bootph-all;
+
+       wdog4: watchdog@420c0000 {
+               compatible = "fsl,imx93-wdt";
+               reg = <0x420c0000 0x10000>;
+               interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&scmi_clk IMX952_CLK_BUSWAKEUP>;
+               timeout-sec = <40>;
+               status = "disabled";
+               bootph-all;
+       };
 };
 
 &aips3 {
@@ -237,6 +247,10 @@
        bootph-pre-ram;
 };
 
+&wdog3 {
+       bootph-all;
+};
+
 &scmi_iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog>;