drm/amd/display: fix dual cursor shows on extend desktop

[why & how]
when dpp pipe power gating disabled in driver, disable_pipe
did not disable cursor so next time as long as this pipe
powers up, it will be visible.

port dcn314 logic: disable cursor when it should be pipe pg.

Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
index b5d7ed5dd511ce23ad3ed2e0136094ae5b26d959..f60e084068c89d9b6c59619a350ffdb147dc73b9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.c
@@ -280,6 +280,14 @@ static void dpp42_dpp_setup(
                dpp3_program_post_csc(dpp_base, color_space, select, NULL);
        }
 }
+static void dcn42_dpp_force_disable_cursor(struct dpp *dpp_base)
+{
+       struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base);
+
+       /* Force disable cursor */
+       REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, 0);
+       dpp_base->pos.cur0_ctl.bits.cur0_enable = 0;
+}
 
 static struct dpp_funcs dcn42_dpp_funcs = {
        .dpp_program_gamcor_lut         = dpp3_program_gamcor_lut,
@@ -302,6 +310,7 @@ static struct dpp_funcs dcn42_dpp_funcs = {
        .dpp_cm_hist_control        = dpp42_dpp_cm_hist_control,
        .dpp_cm_hist_read           = dpp42_dpp_cm_hist_read,
        .dpp_read_reg_state                     = dpp30_read_reg_state,
+       .dpp_force_disable_cursor       = dcn42_dpp_force_disable_cursor,
 };
 
 

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index 894d48fcd7f86691c10b13432e89ea601122b365..71d6f7db93a45350fb6296c2d6254e313fe49688 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -904,6 +904,13 @@ void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx
        if (!pipe_ctx->plane_res.hubp || pipe_ctx->plane_res.hubp->power_gated)
                return;
 
+       if (dc->debug.disable_dpp_power_gate) {
+               /* Workaround for use case when disabled power gating set to 1 */
+               /* Force disable cursor if power gating is disabled */
+               struct dpp *dpp = pipe_ctx->plane_res.dpp;
+               if (dpp && dpp->funcs->dpp_force_disable_cursor)
+                       dpp->funcs->dpp_force_disable_cursor(dpp);
+       }
        if (hws->funcs.plane_atomic_disable)
                hws->funcs.plane_atomic_disable(dc, pipe_ctx);