]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amd/pm: Delete dummy get_dal_power_level implementations
authorTimur Kristóf <timur.kristof@gmail.com>
Tue, 19 May 2026 10:21:14 +0000 (12:21 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 27 May 2026 14:45:07 +0000 (10:45 -0400)
These implementations did not actually return
the DAL power level, so they were effectively
a no-op.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

index 2e671b45f1740c0f3b6df272fee31bf7047def0a..e02a50f208df3b666501c1c60fbc3e35d5defaf3 100644 (file)
@@ -962,12 +962,6 @@ static int smu10_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time
        return 0;
 }
 
-static int smu10_get_dal_power_level(struct pp_hwmgr *hwmgr,
-               struct amd_pp_simple_clock_info *info)
-{
-       return -EINVAL;
-}
-
 static int smu10_force_clock_level(struct pp_hwmgr *hwmgr,
                enum pp_clock_type type, uint32_t mask)
 {
@@ -1663,7 +1657,6 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = {
        .store_cc6_data = smu10_store_cc6_data,
        .force_clock_level = smu10_force_clock_level,
        .emit_clock_levels = smu10_emit_clock_levels,
-       .get_dal_power_level = smu10_get_dal_power_level,
        .get_performance_level = smu10_get_performance_level,
        .get_current_shallow_sleep_clocks = smu10_get_current_shallow_sleep_clocks,
        .get_clock_by_type_with_latency = smu10_get_clock_by_type_with_latency,
index d9899cf7020b6542335f859eb6dd998ed24d4201..243a7a12a240fd6f53e4c89a5f541167f06d4715 100644 (file)
@@ -4386,20 +4386,6 @@ static uint32_t vega10_get_fan_control_mode(struct pp_hwmgr *hwmgr)
                return AMD_FAN_CTRL_AUTO;
 }
 
-static int vega10_get_dal_power_level(struct pp_hwmgr *hwmgr,
-               struct amd_pp_simple_clock_info *info)
-{
-       struct phm_ppt_v2_information *table_info =
-                       (struct phm_ppt_v2_information *)hwmgr->pptable;
-       struct phm_clock_and_voltage_limits *max_limits =
-                       &table_info->max_clock_voltage_on_ac;
-
-       info->engine_max_clock = max_limits->sclk;
-       info->memory_max_clock = max_limits->mclk;
-
-       return 0;
-}
-
 static void vega10_get_sclks(struct pp_hwmgr *hwmgr,
                struct pp_clock_levels_with_latency *clocks)
 {
@@ -5644,7 +5630,6 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
        .set_fan_control_mode = vega10_set_fan_control_mode,
        .get_fan_control_mode = vega10_get_fan_control_mode,
        .read_sensor = vega10_read_sensor,
-       .get_dal_power_level = vega10_get_dal_power_level,
        .get_clock_by_type_with_latency = vega10_get_clock_by_type_with_latency,
        .get_clock_by_type_with_voltage = vega10_get_clock_by_type_with_voltage,
        .set_watermarks_for_clocks_ranges = vega10_set_watermarks_for_clocks_ranges,
index a9a85fd639b28c78af0a80faf4de7be70681ab0c..69a9074058ceba97a25c79e023048a3c86f67f1f 100644 (file)
@@ -1822,21 +1822,6 @@ static uint32_t vega12_get_fan_control_mode(struct pp_hwmgr *hwmgr)
                return AMD_FAN_CTRL_AUTO;
 }
 
-static int vega12_get_dal_power_level(struct pp_hwmgr *hwmgr,
-               struct amd_pp_simple_clock_info *info)
-{
-#if 0
-       struct phm_ppt_v2_information *table_info =
-                       (struct phm_ppt_v2_information *)hwmgr->pptable;
-       struct phm_clock_and_voltage_limits *max_limits =
-                       &table_info->max_clock_voltage_on_ac;
-
-       info->engine_max_clock = max_limits->sclk;
-       info->memory_max_clock = max_limits->mclk;
-#endif
-       return 0;
-}
-
 static int vega12_get_clock_ranges(struct pp_hwmgr *hwmgr,
                uint32_t *clock,
                PPCLK_e clock_select,
@@ -2963,7 +2948,6 @@ static const struct pp_hwmgr_func vega12_hwmgr_funcs = {
        .set_fan_control_mode = vega12_set_fan_control_mode,
        .get_fan_control_mode = vega12_get_fan_control_mode,
        .read_sensor = vega12_read_sensor,
-       .get_dal_power_level = vega12_get_dal_power_level,
        .get_clock_by_type_with_latency = vega12_get_clock_by_type_with_latency,
        .get_clock_by_type_with_voltage = vega12_get_clock_by_type_with_voltage,
        .set_watermarks_for_clocks_ranges = vega12_set_watermarks_for_clocks_ranges,
index dab9b78a9fc86002aae0273a8c7a40594b1b749f..7b8f4c1b80eb0fb5e084e547e2a7236bd42566c1 100644 (file)
@@ -2796,22 +2796,6 @@ static void vega20_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
        }
 }
 
-static int vega20_get_dal_power_level(struct pp_hwmgr *hwmgr,
-               struct amd_pp_simple_clock_info *info)
-{
-#if 0
-       struct phm_ppt_v2_information *table_info =
-                       (struct phm_ppt_v2_information *)hwmgr->pptable;
-       struct phm_clock_and_voltage_limits *max_limits =
-                       &table_info->max_clock_voltage_on_ac;
-
-       info->engine_max_clock = max_limits->sclk;
-       info->memory_max_clock = max_limits->mclk;
-#endif
-       return 0;
-}
-
-
 static int vega20_get_sclks(struct pp_hwmgr *hwmgr,
                struct pp_clock_levels_with_latency *clocks)
 {
@@ -4446,7 +4430,6 @@ static const struct pp_hwmgr_func vega20_hwmgr_funcs = {
        /* export to DAL */
        .get_sclk = vega20_dpm_get_sclk,
        .get_mclk = vega20_dpm_get_mclk,
-       .get_dal_power_level = vega20_get_dal_power_level,
        .get_clock_by_type_with_latency = vega20_get_clock_by_type_with_latency,
        .get_clock_by_type_with_voltage = vega20_get_clock_by_type_with_voltage,
        .set_watermarks_for_clocks_ranges = vega20_set_watermarks_for_clocks_ranges,