]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
mtd: spinand: winbond: Add support for continuous reads on W25NxxJW
authorMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 29 Apr 2026 17:56:48 +0000 (19:56 +0200)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Mon, 4 May 2026 13:23:57 +0000 (15:23 +0200)
As for the W35NxxJW family, add support for W25N{01,02}JW continuous
read support. Similar operations require to be done, such as setting a
specific bit in a configuration register, and providing a set of read
variants without the address cycles.

As read from cache variants are badly supported by SPI memory
controllers, we create a new set of read from cache templates with a
fake address cycle and just enough dummy cycles. There are two
unsupported configurations (which would require 4.5 dummy bytes), so we
just do not provide them.

The same extra value in the ECC is possible as with the W35NxxJW family,
so we reference the same helper to retrieve the ECC status.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/mtd/nand/spi/winbond.c

index 7cc0f0091430c16ab0c6edfd9415c4dfbe6c0575..f538cf2228f8ce8fe477c665fb3f072eb5c789d5 100644 (file)
@@ -511,28 +511,6 @@ static const struct spinand_info winbond_spinand_table[] = {
                     SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
                     SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
                     SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
-       SPINAND_INFO("W35N02JW", /* 1.8V */
-                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
-                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
-                    NAND_ECCREQ(1, 512),
-                    SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
-                                             &write_cache_octal_variants,
-                                             &update_cache_octal_variants),
-                    SPINAND_ODTR_PACKED_PAGE_READ,
-                    SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
-                    SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
-                    SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
-       SPINAND_INFO("W35N04JW", /* 1.8V */
-                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
-                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
-                    NAND_ECCREQ(1, 512),
-                    SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
-                                             &write_cache_octal_variants,
-                                             &update_cache_octal_variants),
-                    SPINAND_ODTR_PACKED_PAGE_READ,
-                    SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
-                    SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
-                    SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
        /* 2G-bit densities */
        SPINAND_INFO("W25M02GV", /* 2x1G-bit 3.3V */
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),
@@ -573,6 +551,17 @@ static const struct spinand_info winbond_spinand_table[] = {
                                              &update_cache_variants),
                     0,
                     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+       SPINAND_INFO("W35N02JW", /* 1.8V */
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x22),
+                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 2, 1),
+                    NAND_ECCREQ(1, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
+                                             &write_cache_octal_variants,
+                                             &update_cache_octal_variants),
+                    SPINAND_ODTR_PACKED_PAGE_READ,
+                    SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
+                    SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
+                    SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
        /* 4G-bit densities */
        SPINAND_INFO("W25N04KV", /* 3.3V */
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),
@@ -592,6 +581,17 @@ static const struct spinand_info winbond_spinand_table[] = {
                                              &update_cache_variants),
                     0,
                     SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
+       SPINAND_INFO("W35N04JW", /* 1.8V */
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xdf, 0x23),
+                    NAND_MEMORG(1, 4096, 128, 64, 512, 10, 1, 4, 1),
+                    NAND_ECCREQ(1, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_octal_variants,
+                                             &write_cache_octal_variants,
+                                             &update_cache_octal_variants),
+                    SPINAND_ODTR_PACKED_PAGE_READ,
+                    SPINAND_INFO_VENDOR_OPS(&winbond_w35_ops),
+                    SPINAND_ECCINFO(&w35n01jw_ooblayout, NULL),
+                    SPINAND_CONFIGURE_CHIP(w35n0xjw_vcr_cfg)),
 };
 
 static int winbond_spinand_init(struct spinand_device *spinand)