drm/amdgpu: add new performance monitor PSP interfaces

Introduce new psp interfaces and structures for performance
monitoring hardware control.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 7e94ec11c57e4e8b412221a7ca7243ae11ba88fe..73e7e919c851c1ac7133c2300750cf5387441f97 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -358,6 +358,27 @@ struct spirom_bo {
 };
 #endif
 
+enum psp_ptl_cmd {
+       PSP_PTL_PERF_MON_QUERY = 0xA0000000,
+       PSP_PTL_PERF_MON_SET = 0xA0000001,
+};
+
+enum psp_ptl_format_type {
+       GFX_FTYPE_I8          = 0x00000000,
+       GFX_FTYPE_F16         = 0x00000001,
+       GFX_FTYPE_BF16        = 0x00000002,
+       GFX_FTYPE_F32         = 0x00000003,
+       GFX_FTYPE_F64         = 0x00000004,
+       GFX_FTYPE_INVALID     = 0xFFFFFFFF,
+};
+
+struct psp_ptl_perf_req {
+       enum psp_ptl_cmd req;
+       uint32_t ptl_state;
+       uint32_t pref_format1;
+       uint32_t pref_format2;
+};
+
 struct psp_context {
        struct amdgpu_device            *adev;
        struct psp_ring                 km_ring;

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index e8f768638fd59ed73eb4b3dced28ef24641c9898..ac34bac3c8391ea25810b5c79dfe915123571692 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
@@ -107,6 +107,7 @@ enum psp_gfx_cmd_id
     GFX_CMD_ID_CONFIG_SQ_PERFMON  = 0x00000046,   /* Config CGTT_SQ_CLK_CTRL */
     /* Dynamic memory partitioninig (NPS mode change)*/
     GFX_CMD_ID_FB_NPS_MODE        = 0x00000048,  /* Configure memory partitioning mode */
+    GFX_CMD_ID_PERF_HW            = 0x0000004C,   /* performance monitor */
     GFX_CMD_ID_FB_FW_RESERV_ADDR  = 0x00000050,  /* Query FW reservation addr */
     GFX_CMD_ID_FB_FW_RESERV_EXT_ADDR = 0x00000051,  /* Query FW reservation extended addr */
 };
@@ -373,6 +374,13 @@ struct psp_gfx_cmd_fb_memory_part {
        uint32_t resvd;
 };
 
+struct psp_gfx_cmd_req_perf_hw {
+       uint32_t req;
+       uint32_t ptl_state;
+       uint32_t pref_format1;
+       uint32_t pref_format2;
+};
+
 /* All GFX ring buffer commands. */
 union psp_gfx_commands
 {
@@ -389,6 +397,7 @@ union psp_gfx_commands
     struct psp_gfx_cmd_sriov_spatial_part cmd_spatial_part;
     struct psp_gfx_cmd_config_sq_perfmon config_sq_perfmon;
     struct psp_gfx_cmd_fb_memory_part cmd_memory_part;
+    struct psp_gfx_cmd_req_perf_hw     cmd_req_perf_hw;
 };
 
 struct psp_gfx_uresp_reserved
@@ -415,12 +424,20 @@ struct psp_gfx_uresp_fw_reserve_info {
     uint32_t reserve_size;
 };
 
+struct psp_gfx_uresp_perf_hw {
+       uint32_t resp;
+       uint32_t ptl_state;
+       uint32_t pref_format1;
+       uint32_t pref_format2;
+};
+
 /* Union of command-specific responses for GPCOM ring. */
 union psp_gfx_uresp {
        struct psp_gfx_uresp_reserved           reserved;
        struct psp_gfx_uresp_bootcfg            boot_cfg;
        struct psp_gfx_uresp_fwar_db_info       fwar_db_info;
        struct psp_gfx_uresp_fw_reserve_info    fw_reserve_info;
+       struct psp_gfx_uresp_perf_hw            perf_hw_info;
 };
 
 /* Structure of GFX Response buffer.