]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm: xlnx: zynqmp: Add support for Y8 and XYYY2101010
authorTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Thu, 23 Apr 2026 14:21:20 +0000 (17:21 +0300)
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Tue, 5 May 2026 11:04:29 +0000 (14:04 +0300)
Add support for Y8 and XYYY2101010 formats. We also need to add new csc
matrices for these y-only formats.

Reviewed-by: Vishal Sagar <vishal.sagar@amd.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patch.msgid.link/20260423-xilinx-formats-v10-9-c690c2b8ea89@ideasonboard.com
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
drivers/gpu/drm/xlnx/zynqmp_disp.c

index 46ea70fd37ec69a6399a8e718d53dad6ef3525a9..175ae1589018ef1a1b2d837c68666de42d984c3d 100644 (file)
@@ -307,6 +307,16 @@ static const struct zynqmp_disp_format avbuf_vid_fmts[] = {
                .buf_fmt        = ZYNQMP_DISP_AV_BUF_FMT_NL_VID_YV16CI_10,
                .swap           = false,
                .sf             = scaling_factors_101010,
+       }, {
+               .drm_fmt        = DRM_FORMAT_Y8,
+               .buf_fmt        = ZYNQMP_DISP_AV_BUF_FMT_NL_VID_MONO,
+               .swap           = false,
+               .sf             = scaling_factors_888,
+       }, {
+               .drm_fmt        = DRM_FORMAT_XYYY2101010,
+               .buf_fmt        = ZYNQMP_DISP_AV_BUF_FMT_NL_VID_YONLY_10,
+               .swap           = false,
+               .sf             = scaling_factors_101010,
        },
 };
 
@@ -697,6 +707,17 @@ static const u32 csc_sdtv_to_rgb_offsets[] = {
        0x0, 0x1800, 0x1800
 };
 
+/* In Y-only mode the single Y channel is on the third column  */
+static const u16 csc_sdtv_to_rgb_yonly_matrix[] = {
+       0x0, 0x0, 0x1000,
+       0x0, 0x0, 0x1000,
+       0x0, 0x0, 0x1000,
+};
+
+static const u32 csc_sdtv_to_rgb_yonly_offsets[] = {
+       0x0, 0x0, 0x0
+};
+
 /**
  * zynqmp_disp_blend_set_output_format - Set the output format of the blender
  * @disp: Display controller
@@ -846,7 +867,11 @@ static void zynqmp_disp_blend_layer_enable(struct zynqmp_disp *disp,
                                ZYNQMP_DISP_V_BLEND_LAYER_CONTROL(layer->id),
                                val);
 
-       if (layer->drm_fmt->is_yuv) {
+       if (layer->drm_fmt->format == DRM_FORMAT_Y8 ||
+           layer->drm_fmt->format == DRM_FORMAT_XYYY2101010) {
+               coeffs = csc_sdtv_to_rgb_yonly_matrix;
+               offsets = csc_sdtv_to_rgb_yonly_offsets;
+       } else if (layer->drm_fmt->is_yuv) {
                coeffs = csc_sdtv_to_rgb_matrix;
                offsets = csc_sdtv_to_rgb_offsets;
        } else {