drm/i915/color: Fix HDR pre-CSC LUT programming loop

The integer lut programming loop never executes completely due to
incorrect condition (i++ > 130).

Fix to properly program 129th+ entries for values > 1.0.

Cc: <stable@vger.kernel.org> #v6.19
Fixes: 82caa1c8813f ("drm/i915/color: Program Pre-CSC registers")
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260519075308.383877-1-pranay.samala@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 2d318e922671b35e7888e3b0ab33a661cbf5ea97..3bfe09d81a4c09cd00cd3b2b5d25361d2068051d 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3976,7 +3976,7 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
                                intel_de_write_dsb(display, dsb,
                                                   PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
                                                   (1 << 24));
-                       } while (i++ > 130);
+                       } while (i++ < 130);
                } else {
                        for (i = 0; i < lut_size; i++) {
                                u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);