ARM: dts: imx6ul-var-som: add support for LVDS display panel

Add support for the LD configuration option (LVDS encoder assembled on SOM)
so that the LVDS display panel on the concerto EVK board works properly.
Not all VAR-SOM-6UL SOMs have the LD configuration option so factor out
this functionality to a separate dtsi.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi
index f099ca5d0e8f0b6a3ff9e7542720ca7336657291..e5637310ba63203ae1b938d68e50030e2856ed69 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi
@@ -44,6 +44,29 @@
                        linux,default-trigger = "heartbeat";
                };
        };
+
+       lvds_panel: lvds-panel {
+               compatible = "sgd,gktw70sdae4se", "panel-lvds";
+               data-mapping = "jeida-18";
+               width-mm = <153>;
+               height-mm = <86>;
+
+               panel-timing {
+                       clock-frequency = <35000000>;
+                       hactive = <800>;
+                       vactive = <480>;
+                       hback-porch = <40>;
+                       hfront-porch = <40>;
+                       vback-porch = <29>;
+                       vfront-porch = <13>;
+                       hsync-len = <48>;
+                       vsync-len = <3>;
+                       hsync-active = <0>;
+                       vsync-active = <0>;
+                       de-active = <1>;
+                       pixelclk-active = <0>;
+               };
+       };
 };
 
 &can1 {
@@ -98,12 +121,6 @@
                >;
        };
 
-       pinctrl_pwm4: pwm4grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO05__PWM4_OUT          0x110b0
-               >;
-       };
-
        pinctrl_rtc: rtcgrp {
                fsl,pins = <
                        MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0x1b0b0 /* RTC alarm IRQ */
@@ -139,12 +156,6 @@
        };
 };
 
-&pwm4 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pwm4>;
-       status = "okay";
-};
-
 &snvs_pwrkey {
        status = "disabled";
 };

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
index 64a3cbd8b7c38233c89450cadf394b0903a6e8e9..725f34d6b7ee9d3b1515f1107f0fcc9fb72ac151 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts
@@ -14,6 +14,7 @@
 #include "imx6ul-var-som-enet2.dtsi"
 #include "imx6ul-var-som-enet1.dtsi"
 #include "imx6ul-var-som-audio.dtsi"
+#include "imx6ul-var-som-lvds-panel.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)";

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
index 9c5cb96beeb17047777e8a4b2e4522bca527ee4a..c249e15772b82a75fd2c4a9971493e02cb0d83cb 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts
@@ -14,6 +14,7 @@
 #include "imx6ul-var-som-sd.dtsi"
 #include "imx6ul-var-som-enet2.dtsi"
 #include "imx6ul-var-som-audio.dtsi"
+#include "imx6ul-var-som-lvds-panel.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)";

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi
new file mode 100644 (file)
index 0000000..996b37d
--- /dev/null
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * LVDS panel support for Variscite VAR-SOM-6UL module.
+ *
+ * Copyright 2019-2024 Variscite Ltd.
+ * Copyright 2026 Dimonoff
+ */
+
+/ {
+       lcd_backlight: lcd-backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm4 0 2000000 0>;
+               pwm-names = "LCD_BKLT_PWM";
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+               status = "okay";
+       };
+
+       lvds_encoder: lvds-encoder {
+               compatible = "ti,sn75lvds93", "lvds-encoder";
+               power-supply = <&reg_3p3v>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               lvds_enc_in: endpoint {
+                                       remote-endpoint = <&lcdif_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               lvds_enc_out: endpoint {
+                                       remote-endpoint = <&lvds_panel_in>;
+                               };
+                       };
+               };
+       };
+};
+
+&iomuxc {
+       pinctrl_lcdif_ctrl: lcdif-ctrl-grp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_CLK__LCDIF_CLK            0x79
+                       MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE      0x79
+               >;
+       };
+
+       pinctrl_lcdif_dat: lcdif-dat-grp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_DATA02__LCDIF_DATA02      0x79
+                       MX6UL_PAD_LCD_DATA03__LCDIF_DATA03      0x79
+                       MX6UL_PAD_LCD_DATA04__LCDIF_DATA04      0x79
+                       MX6UL_PAD_LCD_DATA05__LCDIF_DATA05      0x79
+                       MX6UL_PAD_LCD_DATA06__LCDIF_DATA06      0x79
+                       MX6UL_PAD_LCD_DATA07__LCDIF_DATA07      0x79
+                       MX6UL_PAD_LCD_DATA10__LCDIF_DATA10      0x79
+                       MX6UL_PAD_LCD_DATA11__LCDIF_DATA11      0x79
+                       MX6UL_PAD_LCD_DATA12__LCDIF_DATA12      0x79
+                       MX6UL_PAD_LCD_DATA13__LCDIF_DATA13      0x79
+                       MX6UL_PAD_LCD_DATA14__LCDIF_DATA14      0x79
+                       MX6UL_PAD_LCD_DATA15__LCDIF_DATA15      0x79
+                       MX6UL_PAD_LCD_DATA18__LCDIF_DATA18      0x79
+                       MX6UL_PAD_LCD_DATA19__LCDIF_DATA19      0x79
+                       MX6UL_PAD_LCD_DATA20__LCDIF_DATA20      0x79
+                       MX6UL_PAD_LCD_DATA21__LCDIF_DATA21      0x79
+                       MX6UL_PAD_LCD_DATA22__LCDIF_DATA22      0x79
+                       MX6UL_PAD_LCD_DATA23__LCDIF_DATA23      0x79
+               >;
+       };
+
+       pinctrl_pwm4: pwm4-grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO05__PWM4_OUT          0x110b0 /* LCD BACKLIGHT */
+               >;
+       };
+};
+
+&lcdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lcdif_dat
+                    &pinctrl_lcdif_ctrl>;
+       status = "okay";
+
+       port {
+               lcdif_out: endpoint {
+                       remote-endpoint = <&lvds_enc_in>;
+               };
+       };
+};
+
+&lvds_panel {
+       status = "okay";
+
+       port {
+               lvds_panel_in: endpoint {
+                       remote-endpoint = <&lvds_enc_out>;
+               };
+       };
+};
+
+/* PWM LCD */
+&pwm4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm4>;
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
index 2e1f75d5f25a63269b3c720bdb184f8fc57b63ce..1b7c1a3383eecab9f9332bcae9d897ac17e4b545 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts
@@ -14,6 +14,7 @@
 #include "imx6ul-var-som-enet2.dtsi"
 #include "imx6ul-var-som-enet1.dtsi"
 #include "imx6ul-var-som-audio.dtsi"
+#include "imx6ul-var-som-lvds-panel.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)";

diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts
index 43a477db652fa70c53eaef87ea15360958c5cf4e..9c9d16eb1a11e3d7565b14824b57a0e128d2937f 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts
@@ -13,6 +13,7 @@
 #include "imx6ul-var-som-sd.dtsi"
 #include "imx6ul-var-som-enet2.dtsi"
 #include "imx6ul-var-som-audio.dtsi"
+#include "imx6ul-var-som-lvds-panel.dtsi"
 
 / {
        model = "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)";