rtase: Fix flow control configuration

The hardware has two sets of registers controlling TX/RX flow control.
The effective flow control state is determined by the logical OR of
these two sets of bits.

RTASE_FORCE_TXFLOW_EN and RTASE_FORCE_RXFLOW_EN in RTASE_CPLUS_CMD are
the bits used by the driver to control TX/RX flow control according to
the ethtool pause configuration.

RTASE_TXFLOW_EN and RTASE_RXFLOW_EN in RTASE_GPHY_STD_00 are another
set of TX/RX flow control enable bits. Clear them by default so they do
not keep flow control enabled independently of the driver setting.

With the RTASE_GPHY_STD_00 bits cleared, the effective flow control
state is controlled through RTASE_CPLUS_CMD, so the ethtool setting can
take effect correctly.

Signed-off-by: Justin Lai <justinlai0215@realtek.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20260505064121.31286-1-justinlai0215@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/realtek/rtase/rtase.h b/drivers/net/ethernet/realtek/rtase/rtase.h
index b9209eb6ea7350e27121b4111b3bd33cadf559d9..9bd6872474c11bd927a0938c0243cebdf3c7cda6 100644 (file)
--- a/drivers/net/ethernet/realtek/rtase/rtase.h
+++ b/drivers/net/ethernet/realtek/rtase/rtase.h
@@ -153,6 +153,10 @@ enum rtase_registers {
 #define RTASE_FORCE_TXFLOW_EN BIT(10)
 #define RTASE_RX_CHKSUM       BIT(5)
 
+       RTASE_GPHY_STD_00 = 0x6024,
+#define RTASE_RXFLOW_EN BIT(7)
+#define RTASE_TXFLOW_EN BIT(6)
+
        RTASE_Q0_RX_DESC_ADDR0 = 0x00E4,
        RTASE_Q0_RX_DESC_ADDR4 = 0x00E8,
        RTASE_Q1_RX_DESC_ADDR0 = 0x4000,

diff --git a/drivers/net/ethernet/realtek/rtase/rtase_main.c b/drivers/net/ethernet/realtek/rtase/rtase_main.c
index ef13109c49cff576ab58d96796e1bffbfbe872bf..bde9bccfb5a9bb49f622bfb5b76413a75d98d771 100644 (file)
--- a/drivers/net/ethernet/realtek/rtase/rtase_main.c
+++ b/drivers/net/ethernet/realtek/rtase/rtase_main.c
@@ -974,6 +974,9 @@ static void rtase_hw_config(struct net_device *dev)
        rtase_hw_set_features(dev, dev->features);
 
        /* enable flow control */
+       reg_data16 = rtase_r16(tp, RTASE_GPHY_STD_00);
+       reg_data16 &= ~(RTASE_TXFLOW_EN | RTASE_RXFLOW_EN);
+       rtase_w16(tp, RTASE_GPHY_STD_00, reg_data16);
        reg_data16 = rtase_r16(tp, RTASE_CPLUS_CMD);
        reg_data16 |= (RTASE_FORCE_TXFLOW_EN | RTASE_FORCE_RXFLOW_EN);
        rtase_w16(tp, RTASE_CPLUS_CMD, reg_data16);