From: Ville Syrjälä Date: Tue, 31 Mar 2026 15:42:50 +0000 (+0300) Subject: drm/i915/mchbar: Define the end of the MCHBAR mirror X-Git-Tag: v7.2-rc1~141^2~25^2~130 X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=03f8a13cc18c95bede16d55c08c0dda39f8e23fd;p=thirdparty%2Flinux.git drm/i915/mchbar: Define the end of the MCHBAR mirror Add defines for the end of the MCHBAR mirror. I'm planning to use this for some range sanity checks. BSpec: 51771 Reviewed-by: Jani Nikula Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20260331154259.24600-4-ville.syrjala@linux.intel.com --- diff --git a/drivers/gpu/drm/i915/intel_mchbar_regs.h b/drivers/gpu/drm/i915/intel_mchbar_regs.h index 614d4017b57b3..ca0d421be16c3 100644 --- a/drivers/gpu/drm/i915/intel_mchbar_regs.h +++ b/drivers/gpu/drm/i915/intel_mchbar_regs.h @@ -16,11 +16,16 @@ * every way. It is not accessible from the CP register read instructions. * * Starting from Haswell, you can't write registers using the MCHBAR mirror, - * just read. + * just read. On MTL+ the mirror no longer exists. */ #define MCHBAR_MIRROR_BASE 0x10000 +#define MCHBAR_MIRROR_END 0x13fff + #define MCHBAR_MIRROR_BASE_SNB 0x140000 +#define MCHBAR_MIRROR_END_SNB 0x147fff +#define MCHBAR_MIRROR_END_ICL_RKL 0x14ffff +#define MCHBAR_MIRROR_END_TGL 0x15ffff #define CTG_STOLEN_RESERVED _MMIO(MCHBAR_MIRROR_BASE + 0x34) #define ELK_STOLEN_RESERVED _MMIO(MCHBAR_MIRROR_BASE + 0x48)