From: Shubhrajyoti Datta Date: Tue, 12 May 2026 06:08:48 +0000 (+0530) Subject: dt-bindings: gpio: Add EIO GPIO compatible to gpio-zynq X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=18409d06b4a002cb8550ad7c20273bedc77851df;p=thirdparty%2Fkernel%2Flinux.git dt-bindings: gpio: Add EIO GPIO compatible to gpio-zynq EIO (Extended IO) GPIO is a Xilinx IP block that exposes multiplexed I/O pins through an EIO interface. The EIO GPIO block has 2 banks with 26 GPIOs each (52 total). The GPIO width cannot be determined from the hardware registers, the driver relies on the compatible string to select the correct bank/pin configuration. A new compatible is therefore required. The block is currently present on xa2ve3288 silicon. The compatible string uses version 1.0 matching the IP core version. Acked-by: Rob Herring (Arm) Signed-off-by: Shubhrajyoti Datta Link: https://patch.msgid.link/20260512060917.2096456-3-shubhrajyoti.datta@amd.com Signed-off-by: Bartosz Golaszewski --- diff --git a/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml b/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml index 30a7f836c341b..de24bb361e9f6 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - xlnx,eio-gpio-1.0 - xlnx,pmc-gpio-1.0 - xlnx,versal-gpio-1.0 - xlnx,zynq-gpio-1.0 @@ -30,7 +31,7 @@ properties: gpio-line-names: description: strings describing the names of each gpio line - minItems: 58 + minItems: 52 maxItems: 174 interrupt-controller: true @@ -89,6 +90,16 @@ allOf: minItems: 116 maxItems: 116 + - if: + properties: + compatible: + enum: + - xlnx,eio-gpio-1.0 + then: + properties: + gpio-line-names: + maxItems: 52 + required: - compatible - reg