From: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Date: Mon, 27 Apr 2026 00:52:35 +0000 (+0800)
Subject: dt-bindings: mailbox: qcom: Document Nord CPUCP mailbox controller
X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=388f16c9372d15585b594998f34542ed00fddebf;p=thirdparty%2Fkernel%2Flinux.git

dt-bindings: mailbox: qcom: Document Nord CPUCP mailbox controller

Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
Nord SoC, which is compatible with X1E80100 CPUCP, even though it supports
more IPC channels.

Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
---

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
index 90bfde66cc4a6..c8107d58f3d5d 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
@@ -20,6 +20,7 @@ properties:
           - enum:
               - qcom,glymur-cpucp-mbox
               - qcom,kaanapali-cpucp-mbox
+              - qcom,nord-cpucp-mbox
               - qcom,sm8750-cpucp-mbox
           - const: qcom,x1e80100-cpucp-mbox
       - enum: