From: Ville Syrjälä Date: Tue, 24 Mar 2026 13:48:35 +0000 (+0200) Subject: drm/i915/wm: Reject SAGV consistently when block_time_us==0 X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=38b4408489f2e55932e186fbcc1cc0c3379e7a86;p=thirdparty%2Fkernel%2Flinux.git drm/i915/wm: Reject SAGV consistently when block_time_us==0 We have three ways for the platform to indicate that SAGV is not supported: - pcode returns zero block time - pcode returns only a single QGV point (icl+) - pcode rejects the SAGV enable/disable command (pre-icl) We don't currently consider all those factors when computing pipe_sagv_reject, meaning we might still try to enable SAGV when we should not. I think one plausible scenario is when pcode returns a zero block time, and all the pipes are disabled. In that case intel_crtc_can_enable_sagv() will return true for all pipes, and thus we might try to enable SAGV despite pcode indicating that it's not supported. Make sure pipe_sagv_reject will consistently reject SAGV when our cached block time is zero. That will cover all the aforementioned mechanisms by which SAGV can be disabled. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20260324134843.2364-2-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai --- diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index d45b3bcc6ef0..09988f46e083 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -308,9 +308,6 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state) enum plane_id plane_id; int max_level = INT_MAX; - if (!intel_has_sagv(display)) - return false; - if (!crtc_state->hw.active) return true; @@ -377,6 +374,9 @@ bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); + if (!display->sagv.block_time_us) + return false; + if (!display->params.enable_sagv) return false;