From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Mon, 4 May 2026 12:09:33 +0000 (+0200)
Subject: Merge tag 'clk-renesas-rzg3e-plldsi-tag' into renesas-clk-for-v7.2
X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=6edb69b808042eca12d4be7b923833c1dd94681e;p=thirdparty%2Fkernel%2Flinux.git

Merge tag 'clk-renesas-rzg3e-plldsi-tag' into renesas-clk-for-v7.2

clk: renesas: rzg3e: Add support for DSI clocks

RZ/G3E Clock Pulse Generator PLLDSI limits, shared by clock and MIPI DSI
driver source files.
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6edb69b808042eca12d4be7b923833c1dd94681e