From: Biju Das Date: Mon, 30 Mar 2026 10:44:45 +0000 (+0100) Subject: drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay X-Git-Tag: v7.2-rc1~141^2~26^2~81 X-Git-Url: http://git.ipfire.org/gitweb/index.cgi?a=commitdiff_plain;h=7cbba8a8ba0219a267844d3116dbc77cecb4fcf8;p=thirdparty%2Flinux.git drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay The RZ/G2L hardware manual (Rev. 1.50, May 2025), Section 34.4.2.1, requires waiting at least 1 msec after deasserting the CMN_RSTB signal before the DSI-Tx module is ready. Increase the delay from 1 usec to 1 msec by replacing udelay(1) with fsleep(1000) for RZ/G2L SoCs. Fixes: 7a043f978ed1 ("drm: rcar-du: Add RZ/G2L DSI driver") Cc: stable@vger.kernel.org Reviewed-by: Tommaso Merciai Tested-by: Tommaso Merciai Link: https://patch.msgid.link/20260330104450.128512-3-biju.das.jz@bp.renesas.com Signed-off-by: Biju Das --- diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c index ff95cb9a7de5f..9d9f77d8f9494 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c @@ -528,7 +528,7 @@ static int rzg2l_mipi_dsi_dphy_init(struct rzg2l_mipi_dsi *dsi, if (ret < 0) return ret; - udelay(1); + fsleep(1000); return 0; }